From: Mark Brown on
On Mon, Jun 28, 2010 at 08:44:46AM +0200, Raffaele Recalcati wrote:
> From: Raffaele Recalcati <raffaele.recalcati(a)bticino.it>

It's still very hard to understand what this patch is supposed to do.
As previously mentioned this would probably be a lot clearer if you
split this into multiple patches, for example one adding support for the
fast clock mode, one adding support for selecting the pin used for any
external clock and then further patches with any other changes.

I strongly suggest looking at the commit messages for other patches in
the kernel and trying to follow a similar style.

> Added audio playback support with [frame sync master - clock master] mode
> and with [frame sync master - clock slave].

What are these modes - which clock are you talking about?

> i2s_fast_clock switch can be used to have better approximate or
> symmetric waveforms.

Why would someone choose not to use this?

> clk_input_pin board info can be used to select it depending on hw
> connections

> 3. We haven't changed the evmdm365 support (due also to CPLD that doesn't
> help to understand)
> We don't know in this mode if audio stereo works on evmdm365.
> Probably it does.

This is what makes me unsure if you're trying to add new modes or not -
if you're adding new modes then I'd expect that existing boards would be
unaffected with any changes to use the new feature being easily
seperable.

> + /*
> + * This define works when both clock and FS are output for the cpu
> + * and makes clock very fast (FS is not simmetrical, but sampling

symmetrical.

> + * frequency is better approximated
> + */
> + int i2s_fast_clock;

Is this a bool?

> + /* To be used when cpu gets clock from extenal pin */
> + int clk_input_pin;
> +

How would one use this?

> case SND_SOC_DAIFMT_CBM_CFS:
> - /* McBSP CLKR pin is the input for the Sample Rate Generator.
> - * McBSP FSR and FSX are driven by the Sample Rate Generator. */
> - pcr = DAVINCI_MCBSP_PCR_SCLKME |
> - DAVINCI_MCBSP_PCR_FSXM |
> - DAVINCI_MCBSP_PCR_FSRM;
> + pcr = DAVINCI_MCBSP_PCR_FSRM | DAVINCI_MCBSP_PCR_FSXM;
> + if (dev->clk_input_pin == MCBSP_CLKS)
> + pcr |= DAVINCI_MCBSP_PCR_CLKXM |
> + DAVINCI_MCBSP_PCR_CLKRM;
> + else
> + /*
> + * McBSP CLKR pin is the input for the Sample Rate
> + * Generator.
> + * McBSP FSR and FSX are driven by the Sample Rate
> + * Generator.
> + */
> + pcr |= DAVINCI_MCBSP_PCR_SCLKME;

This looks like you need a switch statement for the clock selection.

> +static int davinci_i2s_dai_set_clkdiv(struct snd_soc_dai *cpu_dai,
> + int div_id, int div)
> +{
> + struct davinci_mcbsp_dev *dev = cpu_dai->private_data;
> + int srgr;
> +
> + dev->clk_div = div;
> + return 0;
> +}
> +

I would add a clock ID here in case someone wants to configure another
clock in the patch.

> + if (master == SND_SOC_DAIFMT_CBS_CFS) {

Use a switch staetment for this too.

> + clk = clk_get(NULL, "pll1_sysclk6");

You're doing a clk_get() every time you go through here but never
freeing it - it would seem better to just do the clk_get() at startup.
I'd also expect this to be doing a clk_get() using the struct device for
the DAI so that the driver can function even if the clock tree for a new
SoC is different.

> + if (clk)
> + freq = clk_get_rate(clk);

clk_get() returns an error pointer on error, not NULL, and...

> + freq = 122000000; /* FIXME ask to Texas */

....this presumably ought to be in an else clause (or perhaps just not
using this clocking at all if you can't find the clock?).

> + } else if (master == SND_SOC_DAIFMT_CBM_CFS) {
> + /* Clock given on CLKS */

What if the user selected a different clock source?

> + if (master == SND_SOC_DAIFMT_CBS_CFS ||
> + master == SND_SOC_DAIFMT_CBS_CFM) {

Again, switch statement.

> + if (master == SND_SOC_DAIFMT_CBS_CFS ||
> + master == SND_SOC_DAIFMT_CBS_CFM) {

Here too.
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From: Troy Kisky on
Raffaele Recalcati wrote:
> + if (dev->i2s_fast_clock) {
> + clk_div = 256;
can you have
f = (freq / params->rate_num) * params->rate_den;
> + do {
> + framesize = (freq / (--clk_div)) /
> + params->rate_num *
> + params->rate_den;
and
framesize = f / (--clk_div);
> + } while (((framesize < 33) || (framesize > 4095)) &&
> + (clk_div));
> + clk_div--;
looks like clk_div can go negative here, should the above while say (clk_div > 1)
> + srgr |= DAVINCI_MCBSP_SRGR_FPER(framesize - 1);
> + } else {
> + /* symmetric waveforms */
> + clk_div = freq / (mcbsp_word_length * 16) /
> + params->rate_num * params->rate_den;
> + srgr |= DAVINCI_MCBSP_SRGR_FPER(mcbsp_word_length *
> + 16 - 1);
> + }
> + clk_div &= 0xFF;
> + srgr |= clk_div;
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From: Mark Brown on
On Wed, Jun 30, 2010 at 10:17:40AM +0200, Raffaele Recalcati wrote:
> 2010/6/28 Mark Brown <broonie(a)opensource.wolfsonmicro.com>

> > It's still very hard to understand what this patch is supposed to do.
> > As previously mentioned this would probably be a lot clearer if you
> > split this into multiple patches, for example one adding support for the
> > fast clock mode, one adding support for selecting the pin used for any
> > external clock and then further patches with any other changes.

> Looking at other paches, they are simpler than mine.

The big problem is you're just making some general (and not particularly
clear) statements about features without saying anything concrete about
what the patch actually does - is there a bug being fixed, a feature
implemented, or what?

> > > Added audio playback support with [frame sync master - clock master]
> > mode
> > > and with [frame sync master - clock slave].

> > What are these modes - which clock are you talking about?

> McBSP i2s interface to external codec.

Perhaps you mean the bit clock on the I2S interface? There are multiple
clocks on the actual I2S link itself, and often people lump in the
master clock for the I2S interface into the interface itself.

> > > i2s_fast_clock switch can be used to have better approximate or
> > > symmetric waveforms.

> > Why would someone choose not to use this?

> I was not sure if symmetric waveform can be a must.
> In general I think it is better a non symmetric, but better approximate,
> waveform.
> Anyway, it is better to have the possibility to choose in my opinion,
> because I have not so much experience in i2s communication.

If I understand this correctly when you say "approximate" what you mean
is "approximate clock rate" so the tradeoff is between the accuracy of
the rate generated and the duty cycle of the output signal?

> > > + /* To be used when cpu gets clock from extenal pin */
> > > + int clk_input_pin;

> > How would one use this?

> looking at 2.5 Clock, Frames, and Data in
> you can select MCBSP_CLKS or other input clock pins.

You need to put this in the comments.

> > > +static int davinci_i2s_dai_set_clkdiv(struct snd_soc_dai *cpu_dai,
> > > + int div_id, int div)
> > > +{
> > > + struct davinci_mcbsp_dev *dev = cpu_dai->private_data;
> > > + int srgr;
> > > +
> > > + dev->clk_div = div;
> > > + return 0;
> > > +}

> > I would add a clock ID here in case someone wants to configure another
> > clock in the patch.

> Can you explain better,
> please?

You need to require a value for div_id.

> > I'd also expect this to be doing a clk_get() using the struct device for
> > the DAI so that the driver can function even if the clock tree for a new..
> > SoC is different.

> Sorry, I don't understand, can you explain me better?

clk_get() takes two parameters, a struct device and a name. You should
be using a clock specified in terms of a particular device, not one with
a NULL pointer for the struct device.

> > > + freq = 122000000; /* FIXME ask to Texas */

> > ...this presumably ought to be in an else clause (or perhaps just not
> > using this clocking at all if you can't find the clock?).

> freq is used to obtain clk_div.
> The real problem is that, as explained in the manual, it is not clear its
> value.
> I hope someone can help!!

I would very strongly expect that the division would be from the clock
rate of the source clock which you can obtain by using clk_get().
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