ATA Protocol
in [Embedded]
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From: R2C on 23 Apr 2008 07:27 Hi All, This is my first post in this forum. If anybody has worked on ATA-3 protocol for hard diks drives,then go ahead with description: Currently i am working on ATA protocol[PIO mode] for hard drives. I am facing a problem while executing Identify device command.I am performing the flow as per flow mentioned in ATA datasheet as follows: 1) reading status register and checking for BSY bit. I am getting it low whenever hard disk is not busy. So that is fine 2)Now selecting device by setting dev bit low. I am setting it low because it's status should match with the cable_Select pin. In my hardware cable select is connected to ground. So i am writing A0h in device/head register. 3)Reading the status register and checking for BSY and DRDY bits. I am getting BSY = 0 and DRDY = 1. So it is ok. 4)Writing command ECh in command register.[Identify Device = ECh]. 5) Checking for Error bit in status register and BSY bit also. I am getting BSY low and ERR bit low. That means no error has occured till now. 6) no I am checking for DRQ bit. But i am not getting DRQ = 1 as per the flow mentioned in ATA-3 Datasheet. Even if I ignore DRQ bit, and start reading data register, i always get FF00, which is not as per outputs mentioned in datasheet for Identify device command. I am getting all 256 words as FF00h only. So i am facing this problem for last seven days and i am not getting any proper documents on internet to sort out this issue.If any body can support me in sorting out this issue,please support me for this. Thanks and Regards. Ravi
From: Martin Griffith on 24 Apr 2008 04:42 On Wed, 23 Apr 2008 06:27:54 -0500, in comp.arch.embedded "R2C" <ravi(a)mrt-communication.com> wrote: >Hi All, > >This is my first post in this forum. > >If anybody has worked on ATA-3 protocol for hard diks drives,then go >ahead with description: > >Currently i am working on ATA protocol[PIO mode] for hard drives. >I am facing a problem while executing Identify device command.I am >performing the flow as per flow mentioned in ATA datasheet as follows: >1) reading status register and checking for BSY bit. I am getting it low >whenever hard disk is not busy. So that is fine >2)Now selecting device by setting dev bit low. I am setting it low because >it's status should match with the cable_Select pin. In my hardware cable >select is connected to ground. So i am writing A0h in device/head >register. >3)Reading the status register and checking for BSY and DRDY bits. I am >getting BSY = 0 and DRDY = 1. So it is ok. >4)Writing command ECh in command register.[Identify Device = ECh]. >5) Checking for Error bit in status register and BSY bit also. I am >getting BSY low and ERR bit low. That means no error has occured till now. >6) no I am checking for DRQ bit. But i am not getting DRQ = 1 as per the >flow mentioned in ATA-3 Datasheet. >Even if I ignore DRQ bit, and start reading data register, i always get >FF00, which is not as per outputs mentioned in datasheet for Identify >device command. I am getting all 256 words as FF00h only. > >So i am facing this problem for last seven days and i am not getting any >proper documents on internet to sort out this issue.If any body can support >me in sorting out this issue,please support me for this. > >Thanks and Regards. >Ravi > > Is there anything on larwe's page? http://www.larwe.com/zws/products/dosfs/index.html martin
From: Aashwini84 on 24 Apr 2008 06:35 On Apr 23, 4:27 pm, "R2C" <r...(a)mrt-communication.com> wrote: > Hi All, > > This is my first post in this forum. > > If anybody has worked on ATA-3 protocol for hard diks drives,then go > ahead with description: > > Currently i am working on ATA protocol[PIO mode] for hard drives. > I am facing a problem while executing Identify device command.I am > performing the flow as per flow mentioned in ATA datasheet as follows: > 1) reading status register and checking for BSY bit. I am getting it low > whenever hard disk is not busy. So that is fine > 2)Now selecting device by setting dev bit low. I am setting it low because > it's status should match with the cable_Select pin. In my hardware cable > select is connected to ground. So i am writing A0h in device/head > register. > 3)Reading the status register and checking for BSY and DRDY bits. I am > getting BSY = 0 and DRDY = 1. So it is ok. > 4)Writing command ECh in command register.[Identify Device = ECh]. > 5) Checking for Error bit in status register and BSY bit also. I am > getting BSY low and ERR bit low. That means no error has occured till now. > 6) no I am checking for DRQ bit. But i am not getting DRQ = 1 as per the > flow mentioned in ATA-3 Datasheet. > Even if I ignore DRQ bit, and start reading data register, i always get > FF00, which is not as per outputs mentioned in datasheet for Identify > device command. I am getting all 256 words as FF00h only. > > So i am facing this problem for last seven days and i am not getting any > proper documents on internet to sort out this issue.If any body can support > me in sorting out this issue,please support me for this. > > Thanks and Regards. > Ravi
From: Didi on 24 Apr 2008 08:47 R2C wrote: > .... > getting BSY low and ERR bit low. That means no error has occured till now. > 6) no I am checking for DRQ bit. But i am not getting DRQ = 1 as per the > flow mentioned in ATA-3 Datasheet. > Even if I ignore DRQ bit, and start reading data register, i always get > FF00, which is not as per outputs mentioned in datasheet for Identify > device command. I am getting all 256 words as FF00h only. > > So i am facing this problem for last seven days and i am not getting any > proper documents on internet to sort out this issue.If any body can support > me in sorting out this issue,please support me for this. Apparently you have found t13.org and ATA-3 (although the earliest I would use is ATA-4) and you seem to have tried a lot so the issue is subtle. I was through this 7-8 years ago - and though it feels as if it had been yesterday my memories are vague. You may have an issue if your processor (and its interface to the ATA bus) is too fast, there are requirements to guarantee some time prior to checking some of the bits (e.g. BSY etc.). I don't know if those requirements are listed in ATA-3, may be they popped up later. My "book" back then was d1153r8.pdf - IIRC, this is *only* by memory and may be completely wrong. But I do not remember having any hard times back then, it just worked for me. So perhaps you should try to wait for a short while prior to status register readings to give the driver controller time to respond - just a wild guess, mind you. Dimiter ------------------------------------------------------ Dimiter Popoff Transgalactic Instruments http://www.tgi-sci.com ------------------------------------------------------ http://www.flickr.com/photos/didi_tgi/sets/72157600228621276/ Original message: http://groups.google.com/group/comp.arch.embedded/msg/f1cd6fe1ee40820f?dmode=source
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