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From: Antti on 12 Apr 2008 08:16
Hi

I was recently very disappointed with the performance of Xilinx
systemACE, but the problem was in my head, a thinking problem and too
little homework - the issue is not related to systemACE or CF cards,
but it is present by almost all flash cards - the "controller
overhead"

very short: any flash-card (except smartmedia or x-d) will only give
some 1-2MB/s data rate when using single sector read commands. Ok it
may differ a little, but by NO MEANS the advertised data rates can be
achieved without multi-sector reads

so there is NO WAY to optimize systemACE driver to get better
performance as long the complete fat library is not optimized to read
data from card in large junks that are sent to CF card as multi-sector
reads

PS, if there is some trick, or if some CF/SD card has VERY small
controller overhead i would be interested to know

Antti
http://antti-lukats.blogspot.com/
From: Antti on 13 Apr 2008 03:59
On 12 Apr., 14:16, Antti <Antti.Luk...(a)googlemail.com> wrote:
> Hi
>
> I was recently very disappointed with the performance of Xilinx
> systemACE, but the problem was in my head, a thinking problem and too
> little homework - the issue is not related to systemACE or CF cards,
> but it is present by almost all flash cards - the "controller
> overhead"
>
> very short: any flash-card (except smartmedia or x-d) will only give
> some 1-2MB/s data rate when using single sector read commands. Ok it
> may differ a little, but by NO MEANS the advertised data rates can be
> achieved without multi-sector reads
>
> so there is NO WAY to optimize systemACE driver to get better
> performance as long the complete fat library is not optimized to read
> data from card in large junks that are sent to CF card as multi-sector
> reads
>
> PS, if there is some trick, or if some CF/SD card has VERY small
> controller overhead i would be interested to know
>
> Antti http://antti-lukats.blogspot.com/

Ha a goodnight sleep makes wonders

we do not usually expect the need to make disassembly and read it, but
this time it explained something:

without looking up Microblaze instruction timings and doing very raw
thumb "cycle count" pro read byte
in Xilinx low level systemACE driver (microblaze, no barrel shifter):

100 system clocks per byte data read from systemACE !
=========================================

for 125MHz system clock it means that XILINX DRIVER overhead alone
limits the bandwidth to around 1MB/s !!

so there is place to optimize and gain more data bandwidth

Antti
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