From: Vladimir Baykov on
Vladimir .Baykov, Overlapping of parallel data processing with their
bit-serial
input, Izvestia VUZov,Priborostroenie, 1990,n4.
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VLSI-Based Bit Conveyers for Digital Signal Processing.
[V. D. Baykov, S. D. Bulgakova; AVTOMATIKA I VYCHISLITELNAYA TEKHNIKA No 6,.
Nov-Dec 90
http://www.dtic.mil/cgi-bin/GetTRDoc?AD=ADA343404&Location=U2&doc=GetTRDoc.pdf
pages 26-27

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VLSI bit pipelines for digital signal processing Source Automatic Control
and Computer Sciences
Volume 24 , Issue 6 (June 1990)

Pages: 43 - 48
Year of Publication: 1990
ISSN:0146-4116
Authors
V. D. Baikov
S. D. Bulgakova

Publisher
Allerton Press, Inc. New York, NY, USA
http://portal.acm.org/citation.cfm?id=129596.129606&coll=Portal&dl=GUIDE&CFID=95080814&CFTOKEN=28604752
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http://www.computer.org/portal/web/csdl/doi?doc=abs/html/mags/dt/1996/01/d1005.htm



V.D.Baykov, S.D.Bulgakova, Combination of functions evaluation with
input of data, Problemi vichislitelnoi matematiki i avtomatizacii
nauchnih issledovanii, All-union conference, Alma-ata, 1988,24-28
October, vol.4,p.16-17








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From: Vladimir Baykov on

In digital signal processing systems, continu�ously arriving input
information first passes through analog-digital converters. Most often,
these analog-digital converters output digital information in a sequen�tial
code beginning with the higher-order bits. Because parallel digital
processors generally operate faster than analog-digital converters do, the
parallel processing of information in a digital processor may be combined
with sequential bit-by-bit input of the information. Such devices are termed
bit conveyers. Most works devoted to creating bit conveyers use a redundant
counting system (for example, with the digits 1,0, 1) for their
computa�tions. This article proposes using the traditional binary counting
system with the digits 0 and 1 to create bit conveyers. This proposal is
made so as to permit exten�sive use of standard modules. The authors propose
algorithms for making functional transforms that make it possible to combine
the bit-by-bit input of information with the parallel processing of that
same information. These transforms include those elementary functions,
coordinate transforms, computations of statistical char�acteristics, and
solutions to linear equation systems that
are characteristic for digital signal processing systems. The article
includes time diagrams and gives relative estimates of the proposed bit
conveyer's precision and speed. Figures 2; tables 5; references 5: 2
Russian, 3 Western.



"Vladimir Baykov" <vladimir(a)baykov.de> schrieb im Newsbeitrag
news:i1qkkl$6ek$1(a)adenine.netfront.net...
>

Vladimir .Baykov, Overlapping of parallel data processing with their
> bit-serial input, Izvestia VUZov,Priborostroenie, 1990,n4.
> ��������������
> ��������������
> VLSI-Based Bit Conveyers for Digital Signal Processing.
> [V. D. Baykov, S. D. Bulgakova; AVTOMATIKA I VYCHISLITELNAYA TEKHNIKA No
> 6,. Nov-Dec 90
> http://www.dtic.mil/cgi-bin/GetTRDoc?AD=ADA343404&Location=U2&doc=GetTRDoc.pdf
> pages 26-27
>
> �����������������
> ������������������
> VLSI bit pipelines for digital signal processing Source Automatic Control
> and Computer Sciences
> Volume 24 , Issue 6 (June 1990)
>
> Pages: 43 - 48
> Year of Publication: 1990
> ISSN:0146-4116
> Authors
> V. D. Baikov
> S. D. Bulgakova
>
> Publisher
> Allerton Press, Inc. New York, NY, USA
> http://portal.acm.org/citation.cfm?id=129596.129606&coll=Portal&dl=GUIDE&CFID=95080814&CFTOKEN=28604752
> ��������������������
> �����������������
> http://www.computer.org/portal/web/csdl/doi?doc=abs/html/mags/dt/1996/01/d1005.htm
>
>
>
> V.D.Baykov, S.D.Bulgakova, Combination of functions evaluation with
> input of data, Problemi vichislitelnoi matematiki i avtomatizacii
> nauchnih issledovanii, All-union conference, Alma-ata, 1988,24-28
> October, vol.4,p.16-17
>
>
>
>
>
>
>
>
> --- news://freenews.netfront.net/ - complaints: news(a)netfront.net ---



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