Computer Architecture
in [Hardware]
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On what archs are PROT_READ and PROT_EXEC independent? Hello, I know that newer Intel and AMD CPUs support readable and non-executable pages. But from my tests, if I use mprotect() to set a page's permission to be PROT_EXEC, that page is still readable. I'm wondering what architectures implement these flags independently? Is it possible to get executable and non-rea... 13 Apr 2008 11:08
The Mark Robert Thorson FAQ: Read all about this LIAR, BULLY, THUG, CYBERSTALKER and HARASSER What is currently known about Mark Thorson: His current email address is eee(a)sonic.net which traces to eee(a)netcom.com http://portal.acm.org/citation.cfm?doid=332012.565004 eee(a)netcom.com traces to mmm(a)cup.portal.com http://catless.ncl.ac.uk/Risks/16.48.html#subj3.1 mmm(a)cup.portal.com traces to his middle na... 8 Apr 2008 16:28
Different Implementations of VLIW . Different Implementations of the same VLIW architecture may not be binary-compatible with each other. I am looking for explaination on the above line. Regards, Ripunjay Tripathi Mr Nick Maclaren is requested to NOT TO BOTHER reading this and do some other useful job, if in hand. ... 7 May 2008 15:04
The Mark Thorson FAQ: Read all about this LIAR, BULLY, THUG, CYBERSTALKER and HARASSER Thank you very much for this synopsis of one of the Snake-oil Propaganda Teams's most deceitful harassers ... Mark Thorson. I would never have known who he was had he not attacked me simultaneously to the Quackwatch SLAPP suit his team mates lost to me. His inane rants denying MCS are almost identical to chemic... 8 Apr 2008 16:28
is this the right place to discuss network architecture for disaster recovery? hello, I am trying to find out all I can about network architectures that cope with site failover, i.e providing for some disaster recovery. Is this the right NG for this topic please? If not then where? Regards, Andrew Marlow ... 8 Apr 2008 19:42
Guessing wrong [Re: performance ...] In article <op.t83afnp3ss38k4(a)khagan.ttx>, "Ken Hagan" <K.Hagan(a)thermoteknix.com> writes: |> |> I did say... |> |> "They have to guess what the market will want some years hence. ... ia64 |> and the P4 strike me as fair examples of a major vendor guessing wrong." |> |> ...so I can see where you're com... 11 Apr 2008 13:29
A race-condition in a SUN paper by Detlefs on reference counting... Here is the paper in question: http://citeseer.ist.psu.edu/cache/papers/cs/25408/http:zSzzSzwww.sun.comzSzresearchzSzpeoplezSzdetlefszSzpaperszSz01-podc.pdf/detlefs01lockfree.pdf on page 8 they present pseudo-code. Here is the function: ___________________________________________________________ void LFRCLoad(S... 4 Apr 2008 10:40
Intel Atom vs ARM In the light of recent discussions, I thought this article would be of interest: http://www.linuxdevices.com/news/NS5492118276.html -- Dr Jon D Harrop, Flying Frog Consultancy http://www.ffconsultancy.com/products/?u ... 18 Apr 2008 18:14
NTP: (Was: Re: performance of hardware dynamic scheduling) In article <6da0e4eb-7236-45a4-8582-acbd03385a71(a)u69g2000hse.googlegroups.com>, David Kanter <dkanter(a)gmail.com> writes: |> On Apr 3, 12:42 am, Terje Mathisen <terje.mathi...(a)hda.hydro.com> |> wrote: |> |> It seems obvious to me that NTP relies on low level software and it's |> reasonable to believe that SMT mi... 5 Apr 2008 06:44
Testing Flash Memory Question I am purchasing a Nand-Flash memory chip.... just stand alone only flash... not a microcontroller or anything. I was wondering if anyone knew of any interfaces or test boards (maybe they are called flash controllers? I'm not sure) that I could use to test the memory... basically I will write a little code to read ... 8 Apr 2008 17:17 |