Computer Architecture
in [Hardware]
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Fiber-optic supercomputer cluster node interconnect? Hi. I was wondering: do high-bandwidth fiber-optic networking devices (like used for the Internet backbone lines) make a good choice for the interconnect for a supercomputing cluster? ... 10 Sep 2008 17:34
artificial intelligence in javascript A working, thinking replica in miniature of the brain-mind at http://mind.sourceforge.net/Mind.html (for MSIE) in JavaScript has just been updated with a new knowledge-base (KB) traversal feature that reactivates dormant concepts during lulls in the man-machine conversation. Present-day computer architecture ne... 5 Sep 2008 15:45
FAST '09 Call For Papers Deadline Approaching The 7th USENIX Conference on File and Storage Technologies (FAST '09) Program Committee would like to remind you that the deadline to contribute to the refereed papers is quickly approaching. Paper submissions are due 9:00 p.m. EDT, September 12, 2008. FAST '09 brings together storage system researchers and pract... 4 Sep 2008 17:07
CFP: SMART'09 - 3rd Workshop on Statistical and Machine learning approaches applied to ARchitectures and compilaTion Apologies if you receive multiple copies of this call. ******************************************************************************** CALL FOR PAPERS 3rd Workshop on Statistical and Machine learning approaches ... 4 Sep 2008 15:03
Who designed the interconnection of EARTH SIMULATOR? A Chinese told me that the interconnection of EARTH SIMULATOR is not developed by NEC. He told me that it is desined by US. Is that true? I google so many times but can't find any information about it. Somebody can told me is that made by JAPAN? Where can i find the information? ... 30 Sep 2008 20:46
Intel's Larabee, Sun's Rock; what else is New and Exciting? The message header says it... There are a few other items I've heard of. There's the chip from ClearSpeed with 96 floating-point processors. There are a couple of GPU-based floating-point accelerator cards; one is forthcoming soon, one is here now but more expensive. There's the new version of the Cell micropr... 3 Sep 2008 00:03
Von Neumann and revisionists [Re: Future architectures [was Re:Intel details future Larrabee ...]] On Mon, 01 Sep 2008 02:42:32 +0100, John Doe <jdoe(a)usenetlove.invalid> wrote: If I needed to know, I'd probably use Performance Monitor in Windows XP. Straight out of the box, performance monitor doesn't have a suitable counter for this. I believe sys-internals do a widget that exposes values from the R... 1 Sep 2008 05:58
AMD working on scaleable hardware-based atomic transactions... On 1 ÓÅÎÔ, 04:09, "Chris M. Thomasson" <n...(a)spam.invalid> wrote: Here ya go: http://www.amd64.org/fileadmin/user_upload/pub/epham08-asf-eval.pdf Cool! It recalls Sun's HTM design, but AMD's design gives explicit control over what locations to lock and what not to lock. Interesting, when we will see it i... 7 Sep 2008 06:34
Von Neumann and revisionists [Re: Future architectures [was Re: Intel details future Larrabee ...]] On Mon, 25 Aug 2008 06:08:42 -0700 (PDT), already5chosen(a)yahoo.com wrote: On Aug 25, 3:53 pm, already5cho...(a)yahoo.com wrote: On Aug 25, 3:36 pm, n...(a)cus.cam.ac.uk (Nick Maclaren) wrote: In article <411fa0ee-729c-4c18-81b0-abaebdeef...(a)l42g2000hsc.googlegroups.com>,already5cho...(a)yahoo.com w... 1 Sep 2008 17:15
after SIMD implementation, is it still a RISC? hello. i'm sure this question must have been discussed a zillion times in the past. but i am unable to dig out any good/extensive reference around this question. the reference i've tells me, three operands and one operation (la MIPS design). so when used on such a architecture, does this SIMD implemented ... 29 Sep 2008 10:51 |