Prev: Fibre Optic Cable Linking
Next: Opps: DDS Interface
From: rickman on 26 Jul 2010 10:19
We happen to be doing an upgrade to an existing card I am selling a
customer and they are asking about the feasibility of providing a DSS
interface (56 kbps AMI encoding). Their thought was to use the audio
I/O which has very strong differential drivers with an output
impedance of 50 ohms. We can boost the sample rate up to 212 ksps,
but with a fixed sample rate. To extract the clock would require a
bit of signal processing, but I feel it is "doable".

However, we also have an EIA-422 interface on board and I realized
that it might be possible to use this instead. The AMI encoding
requires detection of three levels, +V, 0V and -V. The 422 receivers
have bias resistors added for other purposes which can be used to set
a threshold on the input of say, 0.4 volts. One input can be wired
direct and the other inverted detecting both polarity of pulses as
distinct from the zero state.

The output can be done by using one pin from each of two differential
drivers so that both are low, one is high or the other is high.

My concern with this is the lack of adjustment for signal levels.
Whatever threshold is picked for the input would limit the sensitivity
for low signals and also limit the noise discrimination for larger
signals. Likewise, the output would have a single, fixed level. It
looks like these signals are measured as dBdsx (relative to 6 Vpp),
but I haven't found any info on what levels are used. I found test
equipment input specs of +6 to -35 dBdsx. I believe my input circuit
would do ok at a range of +6 to -15 dBdsx or possibly down to -20
dBdsx. -35 dBdsx is only 0.1 Vpp which is too low to reliably detect
using this circuit.

Anyone here worked with DSS interfaces? Any info on what levels are
used on the line?

Rick
 | 
Pages: 1
Prev: Fibre Optic Cable Linking
Next: Opps: DDS Interface