FPGA

increase memory of microblaze
hi, is it possible to increase the available memory for a microblaze after it has been created ? .. i have created a microblaze with 16kb blockram using the base system builder, but now i want to use 32kb .. can this be changed? ... 1 Apr 2008 04:56

Places to visit in Amsterdam and Brussells
> Bob, I sure hope so, however you need to realize that what's funny for native English speakers is not necessarily funny for Russians or French, etc., and vice versa. In any other case I would say nothing, but there are certain subjects, which are a total taboo for making any fun of (or adding twists to... 31 Mar 2008 20:39

Using USB programming cables from Xilinx and Lattice on one Windowsmachine
Hey *, I'm trying to use USB programming cables from both Xilinx and Lattice on the same Windows machine. No luck so far, I can only get one of them working at a time, when I completely uninstall the other's software. Seems like the problem is that both use Jungo's "windrv", and the tools are getting confus... 31 Mar 2008 20:00

Serial Transmission w/o 8B/10B encoding
"Dave" <dhschetz(a)gmail.com> wrote in message news:940082fb-7675-4407-8c91-fd1300a0ed41(a)e60g2000hsh.googlegroups.com... On Mar 26, 10:25 am, "BobW" <nimby_NEEDS...(a)roadrunner.com> wrote: <shakith.ferna...(a)gmail.com> wrote in message news:a01b5815-57f0-4f38-bade-fae9d7937826(a)d4g2000prg.googlegroups.com... 13 Apr 2008 06:09

Writing to DDR RAM on Virtex II Pro Board on PLB Bus
My question: How can I write to DDR SDRAM from a custom IP core on the PLB Bus? Background: I am developing a custom IP core for a Virtex II Pro based system (the Xilinx XUP board). This core captures video data using the Digilent VDEC1 board at a pixel rate of 13 MHz. I would like to write several video frame... 31 Mar 2008 20:39

fpga reset (re-initialize) of spartan3e
Hi, is it possible to force a re initialization from within the fpga ? if I have, for instance. transfered new configuration data to a flash, and want to reinitialize the fpga without using the external prog_b pin ? ... 31 Mar 2008 20:00

Configuring a Spartan 3A1800 ExtremeDSP from Spartan3 cable?
Hi emeb, everyone, emeb wrote: On Mar 20, 7:25 am, Paul Boven <boven(a)jive.nl> wrote: Just ordered a Spartan 3A ExtremeDSP Starter Kit. It comes without a programming cable, but I figured I could re-use the cable from my trusty Digilent parallel cable from the Spartan-3 kit. The pinout is certainly ... 31 Mar 2008 19:19

System Generator Error
Hi, I am trying to generate the ise project files from the system generator token in simulink but i am getting the following error. -------------------------------------------------------------------------------- Summary of Errors: Error 0001: caught standard exception Block: Unspecified ---------------... 31 Mar 2008 19:19

Synthesisable Timer in VHDL
hi all: i am currently working on a "toy" design of my first big project (in VHDL) on the Xilinx Spartan III starter kit. now facing a timer problem and i could not properlly solve it using my limited design experience, here is it: module A will prepare data for output (node : dout(7 downto 0)) to module B wh... 31 Mar 2008 20:00

After reset, the PC register of PPC is not back to 0Xfffffffc
Hi, All, I built a PowerPC system on Xilinx ML410 board (Virtex4 fx60), the system contains 64K OCM instruction memory and 64K PLB data memory. I used XMD to debug the system via the jtagppc, when I reset the system, the PC register went back to a address like "0Xfffff048". But according to the PPC manual, after... 31 Mar 2008 19:19