FPGA

system level language: why all this fuss about
why all this fuss about the need for new system level languages and higher abstraction...systems were also heterogeneous in the past but only few experts did implement them...hardware and software designers were working apart. partitioning was done from the start. despite this engineers were still delivering the r... 10 Apr 2008 07:46

Use of floating point numbers in xilinx EDK .........
In my project the values are floating point. Since these floats take huge memory we have taken an SDRAM controller . These values are input to a custom peripheral which is linked to Microblaze through FSL. I have declared a float array which contains the input values.When i try to read these values using printf in ... 6 Apr 2008 20:10

problem with synthesis of a state machine
The following code runs well in simulation mode but synthesis fails. Please let me know how I can get this synthesized, thanks! Fei `timescale 1ns / 1ps module blink_led(clk, d, led); input clk; input d; output wire led; parameter blink_freq = 2; reg [blink_freq:0] count = 0; reg [1:0] state =... 6 Apr 2008 01:33

Virtex-5 FXT coming soon?
On Mar 23, 4:01 pm, pmull...(a)yahoo.com wrote: On Mar 3, 10:22 am, "BobW" <nimby_NEEDS...(a)roadrunner.com> wrote: "Antti" <Antti.Luk...(a)googlemail.com> wrote in message news:ee42d07c-3062-489e-93b1-d9afa01fbbac(a)y77g2000hsy.googlegroups.com... On 3 Mrz., 17:15, Kolja Sulimma <ksuli...(a)googlemai... 7 Apr 2008 21:30

PLA datasheet - PLS161
Hi all, I am looking for the datasheet of the PLS161 which was a PLA. My interest in it is purely academic. I am teaching a high level digital electronics course and would like my students to see a datasheet of a PLA before progressing to CPLD and FPGA's I would be very grateful if someone could give me the da... 5 Apr 2008 05:37

Project Ideas
Hello everyone i have been working on FPGA and CPLD's for the past 6 months and i have gained sufficent expertise to do something innovative or atleast challenging in my final year project.I have designed ALU units,also implemented the Dice game and also made a processor on a FPGA so my mentor has asked me to come ... 5 Apr 2008 03:25

Xilinx inferred FIFOs
What is the current status now about inferring FIFOs in Virtex 4 or 5 with VHDL ? Brad Smallridge Ai Vision ... 7 Apr 2008 19:56

UK Embedded Masterclass
Hi, just a quick note to let you know that we are running another Embedded Masterclass - it is in London and but to be repeated in Bristol (8th and 13th May). For those of you that have never attended, its a non- sales forum to learn about the latest and greatest stuff. This year will include presentations on 'r... 4 Apr 2008 14:38

Examples for Spartan3 StarterKit
Hi, I'm currently developing some examples for the Spartan3 StarterKit from digilent. Maybe this is interesting for newbies. I know that they are not spectacular at the moment. You can leave me a comment if you want. http://tokisworld.org/spartan3/ Regards Thorsten ... 6 Apr 2008 11:59

Sorry to Those Who Deem This to be Spam: Employment or ScholarshipSought
I posted the following at Mon, 31 Mar 2008 15:36:23 +0200 but it did not seem to penetrate a newsserver into Usenet... On Fri, 28 Mar 2008, Jon Beniston wrote: |----------------------------------------------------------------------| |"Student discovers that real world code isn't quite as perfect as they| |were... 4 Apr 2008 12:57