FPGA

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DDR2 termination
Hi, After reading over the documentation for DDR2 and the SSTL signalling standard, I have a question about the role of termination in DDR2. It appears to me that in addition to the usual termination function, the resistors provide some sort of biasing function around the Vref (1.8v/2) point. Is it the case th... 20 Jun 2008 07:06

altera technical question?
hi all: I have a question about stratix II .An oscillator must drive a constant clock frequency to an FPGA pin. The maximum frequency limit depends on the speed grade of the FPGA. Frequencies of 50 MHz or less should work for most boards.If my oscillator is less than 50 MHz ,how to work about this system ? If a... 20 Jun 2008 21:29

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FPGA JTAG commands
Hi, I am trying to access a QuickLogic FPGA via JTAG. I am using a FTDI DLP2232M-G (and associated FTCJTAG api) to connect to the device. So far I have been able to read and write data to the device sucessfully, or at least i think so! My problem is, that presented with a read / write API functions I have n... 23 Jun 2008 09:37

DMA_BURST_SIZE in Xilinx EDK 9.1i
Hi, i have generated a user ip with dma/sg support. now i want to disable the dma burst transfer. in the vhdl source comment it says: -- specify the size (must be power of 2) of burst that dma uses to -- tranfer data on the bus, a value of one causes dma to use single -- transactions (burst disabled). so i ... 19 Jun 2008 10:36

VHDL refactoring tools
Greetings All, I've just spent 20 mins editing 12 VHDL files to add two signals and route them up and down a design hierarchy. Tedious and not exactly rocket science. Is anyone aware of any refactoring tools out there to automate such processes? Regards, Chris ... 19 Jun 2008 09:34

Error while doing 'Generate Netlist' in xilinx 9.2i
Hi all, When I do Generate Netlist in Xilinx 9.2i, I get the following error - ------------------------- ../synthesis.sh: line 2: $'\r': command not found ../synthesis.sh: line 4: $'\r': command not found ../synthesis.sh: line 6: $'\r': command not found ../synthesis.sh: line 8: $'\r': command not found E... 28 Jun 2008 10:38

NVIDIA�s Tesla T10P Blurs Some Lines
Jeff Cunningham wrote: Speaking of FPGA alternatives, this recently caught my eye. Don't know much about it, but it sure looks cool: http://www.tilera.com/products/processors.php -Jeff Jeff, Where have I seen that before? Ah yes, http://en.wikipedia.org/wiki/Transputer Syms. ... 23 Jun 2008 07:35