From: Ben on
Hi:

My understanding of these terms is as follows:

Harvard: data and instruction storage areas are physically distinct,
with distinct buses for loading/storing of data and instruction
respectively.

Von Neumann: The same physical area in memory is used for data and
instruction storage (logical distinction????), and transport is through
the common bus.

Unified: Storage space is physically the same for instructions and data
(with logical distinctions????), but buses for loading and storing data
and instruction are physically distinct.

Please let me know if these classifications are correct. There may be
more distinctions, but what about the factual correctness of these
above points?

Any thoughts are welcome

Partho

From: jon@beniston.com on

> Harvard: data and instruction storage areas are physically distinct,
> with distinct buses for loading/storing of data and instruction
> respectively.
>
> Von Neumann: The same physical area in memory is used for data and
> instruction storage (logical distinction????), and transport is through
> the common bus.
>
> Unified: Storage space is physically the same for instructions and data
> (with logical distinctions????), but buses for loading and storing data
> and instruction are physically distinct.
>
> Please let me know if these classifications are correct. There may be
> more distinctions, but what about the factual correctness of these
> above points?
>
> Any thoughts are welcome

Close enough for a couple of marks, I reckon.

Cheers,
JonB

From: Ben on

then assuming the statements are corect, could you give me some addl
differences in brief?

Partho


jon(a)beniston.com wrote:
> > Harvard: data and instruction storage areas are physically distinct,
> > with distinct buses for loading/storing of data and instruction
> > respectively.
> >
> > Von Neumann: The same physical area in memory is used for data and
> > instruction storage (logical distinction????), and transport is through
> > the common bus.
> >
> > Unified: Storage space is physically the same for instructions and data
> > (with logical distinctions????), but buses for loading and storing data
> > and instruction are physically distinct.
> >
> > Please let me know if these classifications are correct. There may be
> > more distinctions, but what about the factual correctness of these
> > above points?
> >
> > Any thoughts are welcome
>
> Close enough for a couple of marks, I reckon.
>
> Cheers,
> JonB

From: Jim Haynes on
I'd say the key idea of von Neumann is that the instructions can be
operated on as data. In the days before index registers the only
way you could have a loop of code operating on successive array
elements was to do arithmetic on the address parts of the instructions
within the loop.

I suppose one could argue whether Harvard requires a physical separation
of program and data memory, or whether there is a "virtual Harvard"
where the program memory is unwritable by the program even though it is
physically the same or nearly the same as data memory. One example is
the Burroughs machines B-6500 and later, in which program memory is
tagged and cannot be written by the program; and data memory is tagged
and cannot be executed. Another example is a microcomputer in which
the program memory is read-only but addressable in the same space as
the read-write memory.

Some have stretched the notion of Harvard to include machines - I think
these were Univac - in which the is just one memory but there are separate
ports for instruction access and for data access.

Is a microprogrammed machine a "micro-Harvard" because the microprogram
is stored separately from the data memory? yet the machine that is
implemented by the microprogram might be a von Neumann architecture.
--

jhhaynes at earthlink dot net

From: Ben on


>
> I suppose one could argue whether Harvard requires a physical separation
> of program and data memory, or whether there is a "virtual Harvard"
> where the program memory is unwritable by the program even though it is
> physically the same or nearly the same as data memory.

So memories even with logical distinction between instruction and data
spaces (but same physical space) qualify to be "Virtual" Harvards,
rather than Von Neumanns (which make instructions and data share the
same logical as well as physical space)??

What about distinctions between bus architectures? Do some modified
Harvards have a virtual bus arch where there is space/time sharing
making it logically harvard, but physically von neumann??? Do von
neumanns continue to define same physical/logical space even for buses?

What about unifieds?


Partho

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