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From: Andre Majorel on 14 Apr 2008 09:31
Out of curiosity :

Are there or have there ever been processors with different
instructions for conditional branches likely to be taken and
conditional branches UNlikely to be taken ?

If so, did/does that help ?

--
Andr� Majorel <URL:http://www.teaser.fr/~amajorel/>
(Counterfeit: ijif(a)charon.com zonos(a)whitehorse.com)
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From: Norbert Juffa on 14 Apr 2008 12:47
"Andre Majorel" <cheney(a)halliburton.com> wrote in message news:slrng06n4h.2sk.cheney(a)atc5.vermine.org...
> Out of curiosity :
>
> Are there or have there ever been processors with different
> instructions for conditional branches likely to be taken and
> conditional branches UNlikely to be taken ?
>
> If so, did/does that help ?

The SPARC architecture has branch instructions with a hint for taken /
not taken. In conjunction with profiler directed optimizations it can
help performance. I do not recall cases where the impact was huge, but
then my exposure to SPARC has been limited. Maybe someone from Sun can
provide some hard data, or point at a relevant publication.


-- Norbert


From: Wojciech Muła on 14 Apr 2008 13:22
Andre Majorel <cheney(a)halliburton.com> wrote:

> Out of curiosity :
>
> Are there or have there ever been processors with different
> instructions for conditional branches likely to be taken and
> conditional branches UNlikely to be taken ?

Since Pentium4 branch hints are available. Hints are
prefixes for existings conditional jumps:
http://softwarecommunity.intel.com/articles/eng/3431.htm

w.
From: Gavin Scott on 14 Apr 2008 13:46
Andre Majorel <cheney(a)halliburton.com> wrote:

> Are there or have there ever been processors with different
> instructions for conditional branches likely to be taken and
> conditional branches UNlikely to be taken ?

Sure. IPF branches for example let you request static or dynamic
prediction and whether or not to assume taken or not taken when
there is no other informaiton available. I don't know to what
degree the various implementations use this stuff.

I think is was/is some version(s) of PA-RISC that slipped this
functionality in long after the architecture and instruction
coding was done. I believe they encode the taken/not taken
prediction in the choice of an odd vs. even register number
for one of the arguments. This is a vague memory however so
the details may be wrong.

G.
From: ArarghMail804NOSPAM on 15 Apr 2008 00:27
On Mon, 14 Apr 2008 19:22:08 +0200, Wojciech Mu�a
<wojciech_mula(a)poczta.null.onet.pl.invalid> wrote:

>Andre Majorel <cheney(a)halliburton.com> wrote:
>
>> Out of curiosity :
>>
>> Are there or have there ever been processors with different
>> instructions for conditional branches likely to be taken and
>> conditional branches UNlikely to be taken ?
>
>Since Pentium4 branch hints are available. Hints are
>prefixes for existings conditional jumps:
>http://softwarecommunity.intel.com/articles/eng/3431.htm
>
>w.
"Bad Request (Invalid Hostname)" is not real useful. :-)
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