From: Haile Yu (Harry) on
Dear all,

I've designed a macro, and put "ring.nmc" file in my project dir.
In my verilog module file, I wrote
....
ring r1(.en(en),.ro(ro));
....
to instantiate ring macro, but failed.

Any one could give some hint?

Thank you!
From: Jim Wu on
On Apr 19, 12:15 pm, "Haile Yu (Harry)" <h...(a)cse.cuhk.edu.hk> wrote:
> Dear all,
>
> I've designed a macro, and put "ring.nmc" file in my project dir.
> In my verilog module file, I wrote
> ...
> ring r1(.en(en),.ro(ro));
> ...
> to instantiate ring macro, but failed.
>
> Any one could give some hint?
>
> Thank you!

Can you copy the exact error message here? That may give some hint?

Cheers,
Jim
http://home.comcast.net/%7Ejimwu88/tools/
From: Kevin Neilson on
Haile Yu (Harry) wrote:
> Dear all,
>
> I've designed a macro, and put "ring.nmc" file in my project dir.
> In my verilog module file, I wrote
> ...
> ring r1(.en(en),.ro(ro));
> ...
> to instantiate ring macro, but failed.
>
> Any one could give some hint?
>
> Thank you!
If this is a ring oscillator, you may be having problems with the tools
stripping away the logic. -Kevin
From: Moazzam on
On Apr 21, 10:12 pm, Kevin Neilson
<kevin_neil...(a)removethiscomcast.net> wrote:
> Haile Yu (Harry) wrote:
> > Dear all,
>
> > I've designed a macro, and put "ring.nmc" file in my project dir.
> > In my verilog module file, I wrote
> > ...
> > ring r1(.en(en),.ro(ro));
> > ...
> > to instantiate ring macro, but failed.
>
> > Any one could give some hint?
>
> > Thank you!
>
> If this is a ring oscillator, you may be having problems with the tools
> stripping away the logic.  -Kevin

Hi,
Kevin is right, also I use macros: declared as black box and write
their "portlist followed by endmodule " in a "macro_name.v" file in
the working directory.

Hope this helps,
/MH
From: Kevin Neilson on
Moazzam wrote:
> On Apr 21, 10:12 pm, Kevin Neilson
> <kevin_neil...(a)removethiscomcast.net> wrote:
>> Haile Yu (Harry) wrote:
>>> Dear all,
>>> I've designed a macro, and put "ring.nmc" file in my project dir.
>>> In my verilog module file, I wrote
>>> ...
>>> ring r1(.en(en),.ro(ro));
>>> ...
>>> to instantiate ring macro, but failed.
>>> Any one could give some hint?
>>> Thank you!
>> If this is a ring oscillator, you may be having problems with the tools
>> stripping away the logic. -Kevin
>
> Hi,
> Kevin is right, also I use macros: declared as black box and write
> their "portlist followed by endmodule " in a "macro_name.v" file in
> the working directory.
>
> Hope this helps,
> /MH
I'm not sure what you mean, and your syntax is unusual: I think a
"macro" is a software term. Anyway, I'm not sure what the issue is
here, but if you are trying to make a ring oscillator, one problem is
that the synthesizer and mapper try to strip it away because it's a
combinatorial loop and makes no sense from a logical standpoint. So you
might have to put some sort of "keep" directives to prevent this. -Kevin