From: Alexander Graf on

On 22.04.2010, at 12:33, Joerg Roedel wrote:

> This patch implements the reporting of the emulated SVM
> features to userspace instead of the real hardware
> capabilities. Every real hardware capability needs emulation
> in nested svm so the old behavior was broken.
>
> Cc: stable(a)kernel.org

Again, please don't CC stable directly.

> Signed-off-by: Joerg Roedel <joerg.roedel(a)amd.com>
> ---
> arch/x86/kvm/svm.c | 10 ++++++++++
> 1 files changed, 10 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index 0fa2035..65fc114 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -3154,6 +3154,16 @@ static void svm_cpuid_update(struct kvm_vcpu *vcpu)
>
> static void svm_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry)
> {
> + switch (func) {
> + case 0x8000000A:
> + entry->eax = 1; /* SVM revision 1 */
> + entry->ebx = 8; /* Lets support 8 ASIDs in case we add proper
> + ASID emulation to nested SVM */

I completely forgot what we do now. What do we do? It shouldn't be too hard to keep a table around and just assign 8 host ASIDs to the guest. If possible lazily, so we can just flush the whole thing when we run out of entries.

It's basically the same as my VSID mapping on ppc64 actually. See arch/powerpc/kvm/book3s_64_mmu_host.c and search for "slb".

> + entry->ecx = 0; /* Reserved */
> + entry->edx = 0; /* Do not support any additional features */

What about nnpt? Hasn't that been accepted yet?


Alex

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From: Joerg Roedel on
On Fri, Apr 23, 2010 at 03:55:15PM +0200, Alexander Graf wrote:
>
> On 22.04.2010, at 12:33, Joerg Roedel wrote:
> > static void svm_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry)
> > {
> > + switch (func) {
> > + case 0x8000000A:
> > + entry->eax = 1; /* SVM revision 1 */
> > + entry->ebx = 8; /* Lets support 8 ASIDs in case we add proper
> > + ASID emulation to nested SVM */
>
> I completely forgot what we do now. What do we do? It shouldn't be too
> hard to keep a table around and just assign 8 host ASIDs to the guest.
> If possible lazily, so we can just flush the whole thing when we run
> out of entries.

Currently we have no ASID emulation. We just assign a new asid at every
vmrun/vmexit. But I have a rough idea of how we can emulate ASIDs for
the L2 guest with an per-vcpu ASID cache.

> It's basically the same as my VSID mapping on ppc64 actually. See
> arch/powerpc/kvm/book3s_64_mmu_host.c and search for "slb".

Thanks, will have a look there.

> > + entry->ecx = 0; /* Reserved */
> > + entry->edx = 0; /* Do not support any additional features */
>
> What about nnpt? Hasn't that been accepted yet?

I am currently working on it. If all goes well I can submit a new
version next week.

Joerg


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