From: Jim Granville on
Tom�s � h�ilidhe wrote:
>
> The method of using one pin would be implemented by feeding the
> microcontroller pin into a 3-Bit binary counter which feeds into a 3-
> to-8 decoder.
>
> I've been warned against using the one-pin method, people telling me
> that I could lose sync if "a bit of static" or "a bit of noise" gets
> in.

....but you forgot to explain here how the one wire system is implemented!

Any system that relies on a Power-reset action, and then
assumes thereafter 'everything is ok' IS a risky design.
ESD events, and noise spikes from mains contacts are common
disturbance sources.

If all that happens is your display 'loses the plot', then
the user will likely respond with a power-cycle.

Microsoft would consider that a "Shippable Quality Standard"

Ford and Toyota, probably would not.


There are plenty of ways to build a SYNC/reset into a one wire clocking
system. Feed the CLK into the CTR reset, via a RC circuit, and then
eg: holding CLK HI for a 'long time' will reset the device, whilst
a clock that is mostly low, with narrow positive pulses will simply clock.
If the CTR is +ve reset, the taking the CAP to +5V will also give an
element of POR.
That type of design, can resync under software control.

-jg

From: Spehro Pefhany on
On Tue, 6 May 2008 19:24:07 -0400, the renowned Robert Adsett
<sub2(a)aeolusdevelopment.com> wrote:

>In article <4a022b33-2119-4a50-a20f-5bf963cb1365@
>25g2000hsx.googlegroups.com>, Tom�s � h�ilidhe says...
>> For my own project board, I went with the one-pin method. I left the
>> board on overnight for three nights in a row and I never lost sync
>> (don't ask me how many million times the display flashed).
>
>That reminds me of a cost reduction process I saw. The fellow removed a
>cap, repowered the device and watched it start successfully. Scratched
>that cap off the BOM and repeated....
>
>Robert
>** Posted from http://www.teranews.com **


Ah, the "Madman Muntz" school of cost reduction.,

http://en.wikipedia.org/wiki/Madman_Muntz

By trial and error, Muntz developed a television chassis that produced
an acceptable monochrome picture with just 17 tubes. He carried a pair
of wire clippers around and when he thought one of his employees was
"overengineering" a circuit, he would begin snipping components out
until the picture or sound stopped working. At that point, he would
tell the engineer "Well, I guess you have to put that last part back
in" and walk away.

I wonder what he'd have done if he saw a modern FPGA with several
hundred bypass capacitors.


Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff(a)interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
From: Dombo on
Spehro Pefhany schreef:
> On Tue, 6 May 2008 19:24:07 -0400, the renowned Robert Adsett
> <sub2(a)aeolusdevelopment.com> wrote:
>
>> In article <4a022b33-2119-4a50-a20f-5bf963cb1365@
>> 25g2000hsx.googlegroups.com>, Tom�s � h�ilidhe says...
>>> For my own project board, I went with the one-pin method. I left the
>>> board on overnight for three nights in a row and I never lost sync
>>> (don't ask me how many million times the display flashed).
>> That reminds me of a cost reduction process I saw. The fellow removed a
>> cap, repowered the device and watched it start successfully. Scratched
>> that cap off the BOM and repeated....
>>
>> Robert
>> ** Posted from http://www.teranews.com **
>
>
> Ah, the "Madman Muntz" school of cost reduction.,
>
> http://en.wikipedia.org/wiki/Madman_Muntz
>
> By trial and error, Muntz developed a television chassis that produced
> an acceptable monochrome picture with just 17 tubes. He carried a pair
> of wire clippers around and when he thought one of his employees was
> "overengineering" a circuit, he would begin snipping components out
> until the picture or sound stopped working. At that point, he would
> tell the engineer "Well, I guess you have to put that last part back
> in" and walk away.
>
> I wonder what he'd have done if he saw a modern FPGA with several
> hundred bypass capacitors.

Probably the same as the Chinese do...