Moving Interrupt Table on Ti 6416DSK with SignalWare AED_109
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From: Kenneth Lakin on 15 Sep 2005 10:27 Hello, My name is Kenneth Lakin. I am working with a SignalWare AED_109 analogue daughtercard attached to a Texas Instruments 6416DSK. I am modifying SignalWare's analogue daughtercard sample program. I am attempting to burn the sample program into the DSK's on-board flash, and have it start executing on power up. In order to do this, I must relocate the start of the memory section that contains the interrupt table (INT_RAM) away from address 0x0. (According to SPRA999, upon power up, the 64x DSP loads the first 1K of code from flash to address 0x0, then begins program execution from that point.) I have verified that this process stomps all over the previous memory contents in that spot, so the relocation of the interrupt table is necessary. Regardless what code I have in flash, whenever I move the start of the INT_RAM section less than 0xE0 bytes away from 0x0, the sample program will create a few lines of output, and hang in the _unexp_int07 routine. If I move the start of the INT_RAM section more than 0xE0 bytes from 0x0, the sample program will operate normally up until the FPGA is initialized. At the point of FPGA initialization, execution of the program will immediately jump to the beginning of the main function and continue. This loop continues indefinitely. I have spoken to SignalWare about the issue. They have suggested that I am moving the interrupt vector, and am not updating a register that tells the CPU where the interrupt vector is relocated to. I have examined SPRU190d (Peripherals Reference Guide), SPRU273b (Peripheral Support Library Reference), and SPRA554c (Vector Table and Boot ROM Creation). This last document mentions an "interrupt service table pointer" (ISTP). Search as I might, I can find nothing that tells me /where/ the ISTP is so that I might modify it. Would someone kindly point me in the direction of enlightening documentation? Many thanks, Kenneth Lakin
From: Randy Yates on 15 Sep 2005 13:14 Look in the datasheet for your specific processor, the 6416. --RY
From: Brad Griffis on 15 Sep 2005 23:38
Kenneth Lakin wrote: > Hello, > > My name is Kenneth Lakin. > > I am working with a SignalWare AED_109 analogue daughtercard attached to > a Texas Instruments 6416DSK. I am modifying SignalWare's analogue > daughtercard sample program. I am attempting to burn the sample program > into the DSK's on-board flash, and have it start executing on power up. > In order to do this, I must relocate the start of the memory section > that contains the interrupt table (INT_RAM) away from address 0x0. > (According to SPRA999, upon power up, the 64x DSP loads the first 1K of > code from flash to address 0x0, then begins program execution from that > point.) I have verified that this process stomps all over the previous > memory contents in that spot, so the relocation of the interrupt table > is necessary. > Regardless what code I have in flash, whenever I move the start of the > INT_RAM section less than 0xE0 bytes away from 0x0, the sample program > will create a few lines of output, and hang in the _unexp_int07 routine. > If I move the start of the INT_RAM section more than 0xE0 bytes from > 0x0, the sample program will operate normally up until the FPGA is > initialized. At the point of FPGA initialization, execution of the > program will immediately jump to the beginning of the main function and > continue. This loop continues indefinitely. > I have spoken to SignalWare about the issue. They have suggested that I > am moving the interrupt vector, and am not updating a register that > tells the CPU where the interrupt vector is relocated to. I have > examined SPRU190d (Peripherals Reference Guide), SPRU273b (Peripheral > Support Library Reference), and SPRA554c (Vector Table and Boot ROM > Creation). This last document mentions an "interrupt service table > pointer" (ISTP). Search as I might, I can find nothing that tells me > /where/ the ISTP is so that I might modify it. Would someone kindly > point me in the direction of enlightening documentation? > > Many thanks, > Kenneth Lakin Kenneth, A description of the ISTP register can be found in the c6000 CPU and Instruction Set Reference Guide on page 8-8 (651 of 685 in Acrobat): http://www-s.ti.com/sc/psheets/spru189f/spru189f.pdf It is a true CPU register (i.e. it's not located at an address) so you need to access it by using the cregister keyword: extern cregister volatile unsigned int ISTP; This is documented in the Compiler User's Guide: http://focus.ti.com/docs/apps/catalog/resources/appnoteabstract.jhtml?abstractName=spru187l Note also in the CPU Guide that the bottom 10 bits of ISTP are read-only bits. This means that your interrupt vector table must be located on a 1k byte boundary such that the lower 10 bits of the address are all zero. Brad |