Need of "Precise Exceptions"
|
Prev: www.sicortex.com
Next: Intel AVX
From: Ripunjay Tripathi on 3 Apr 2008 03:25 Any processor with demand paging or IEEE arithmetic trap handlers must make its exceptions "precise", either in the hardware or with some software support. Can somebody help me justifying this ?? Regards, Ripunjay Tripathi
From: Terje Mathisen on 3 Apr 2008 03:34 Ripunjay Tripathi wrote: > Any processor with demand paging or IEEE arithmetic trap handlers must > make its exceptions "precise", either in the hardware or with some > software support. > > Can somebody help me justifying this ?? Sure, see below: Any processor with demand paging or IEEE arithmetic trap handlers must make its exceptions "precise", either in the hardware or with some software support. Notice that it is both left- and right-justifed! :-) Terje > > > Regards, > Ripunjay Tripathi -- - <Terje.Mathisen(a)hda.hydro.com> "almost all programming can be viewed as an exercise in caching"
From: Ripunjay Tripathi on 3 Apr 2008 04:53 Wow !! that was intelligent answer. Now plz give me a real answer if u can. Regards, Ripunjay Tripathi On Apr 3, 12:34 pm, Terje Mathisen <terje.mathisen(a)hda.hydro.com> wrote: > Ripunjay Tripathi wrote: > > Any processor with demand paging or IEEE arithmetic trap handlers must > > make its exceptions "precise", either in the hardware or with some > > software support. > > > Can somebody help me justifying this ?? > > Sure, see below: > > Any processor with demand paging or IEEE arithmetic > trap handlers must make its exceptions "precise", > either in the hardware or with some software support. > > Notice that it is both left- and right-justifed! :-) > > Terje > > > > > Regards, > > Ripunjay Tripathi > > -- > - <Terje.Mathisen(a)hda.hydro.com> > "almost all programming can be viewed as an exercise in caching"
From: Nick Maclaren on 3 Apr 2008 05:16 In article <f9db3d72-6cc2-454d-ad67-52f3e76577ab(a)n58g2000hsf.googlegroups.com>, Ripunjay Tripathi <ripunjay.tripathi(a)gmail.com> writes: |> Wow !! that was intelligent answer. |> |> Now plz give me a real answer if u can. Look at your reading list, beg, borrow, buy or steal one of the books on computer architecture, and read it. You will then be Enlightened. Regards, Nick Maclaren.
From: Ken Hagan on 3 Apr 2008 06:55
On Thu, 03 Apr 2008 08:25:16 +0100, Ripunjay Tripathi <ripunjay.tripathi(a)gmail.com> wrote: > Any processor with demand paging or IEEE arithmetic trap handlers must > make its exceptions "precise", either in the hardware or with some > software support. > > Can somebody help me justifying this ?? precise -> restartable |