Prev: arch/powerpc/sysdev/cpm2_pic.h: Checkpatch cleanup
Next: [PATCH 4/9] tsc, x86: use new perfctr reservation functions in tsc code
From: Robert Richter on 4 Mar 2010 12:00
Current perfctr reservation code allocates single pmu msrs. The msr
addresses may differ depending on the model and offset calculation is
necessary. This can be easier implemented by reserving a counter by
its index only.

Cc: Thomas Gleixner <tglx(a)linutronix.de>
Cc: Andi Kleen <andi(a)firstfloor.org>
Signed-off-by: Robert Richter <robert.richter(a)amd.com>
---
arch/x86/include/asm/nmi.h | 2 ++
arch/x86/kernel/cpu/perfctr-watchdog.c | 29 ++++++++++++++++++++---------
arch/x86/oprofile/op_model_amd.c | 4 ++--
arch/x86/oprofile/op_model_ppro.c | 4 ++--
4 files changed, 26 insertions(+), 13 deletions(-)

diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h
index 93da9c3..f5db47d 100644
--- a/arch/x86/include/asm/nmi.h
+++ b/arch/x86/include/asm/nmi.h
@@ -19,6 +19,8 @@ extern void die_nmi(char *str, struct pt_regs *regs, int do_panic);
extern int check_nmi_watchdog(void);
extern int nmi_watchdog_enabled;
extern int avail_to_resrv_perfctr_nmi_bit(unsigned int);
+extern int reserve_perfctr(unsigned int);
+extern void release_perfctr(unsigned int);
extern int reserve_perfctr_nmi(unsigned int);
extern void release_perfctr_nmi(unsigned int);
extern int reserve_evntsel_nmi(unsigned int);
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 5c129ee..0868b8b 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -117,11 +117,8 @@ int avail_to_resrv_perfctr_nmi_bit(unsigned int counter)
}
EXPORT_SYMBOL(avail_to_resrv_perfctr_nmi_bit);

-int reserve_perfctr_nmi(unsigned int msr)
+int reserve_perfctr(unsigned int counter)
{
- unsigned int counter;
-
- counter = nmi_perfctr_msr_to_bit(msr);
/* register not managed by the allocator? */
if (counter > NMI_MAX_COUNTER_BITS)
return 1;
@@ -130,19 +127,33 @@ int reserve_perfctr_nmi(unsigned int msr)
return 1;
return 0;
}
-EXPORT_SYMBOL(reserve_perfctr_nmi);
+EXPORT_SYMBOL(reserve_perfctr);

-void release_perfctr_nmi(unsigned int msr)
+void release_perfctr(unsigned int counter)
{
- unsigned int counter;
-
- counter = nmi_perfctr_msr_to_bit(msr);
/* register not managed by the allocator? */
if (counter > NMI_MAX_COUNTER_BITS)
return;

clear_bit(counter, perfctr_nmi_owner);
}
+EXPORT_SYMBOL(release_perfctr);
+
+int reserve_perfctr_nmi(unsigned int msr)
+{
+ unsigned int counter;
+ counter = nmi_perfctr_msr_to_bit(msr);
+ return reserve_perfctr(counter);
+}
+EXPORT_SYMBOL(reserve_perfctr_nmi);
+
+void release_perfctr_nmi(unsigned int msr)
+{
+ unsigned int counter;
+
+ counter = nmi_perfctr_msr_to_bit(msr);
+ release_perfctr(counter);
+}
EXPORT_SYMBOL(release_perfctr_nmi);

int reserve_evntsel_nmi(unsigned int msr)
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 79e79a6..905995d 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -134,7 +134,7 @@ static void op_amd_fill_in_addresses(struct op_msrs * const msrs)
int i;

for (i = 0; i < NUM_COUNTERS; i++) {
- if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i)) {
+ if (reserve_perfctr(i)) {
msrs->counters[i].addr = MSR_K7_PERFCTR0 + i;
msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i;
}
@@ -428,7 +428,7 @@ static void op_amd_shutdown(struct op_msrs const * const msrs)

for (i = 0; i < NUM_COUNTERS; ++i) {
if (msrs->counters[i].addr)
- release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
+ release_perfctr(i);
}
}

diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index d6abdf6..a838ee4 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -35,7 +35,7 @@ static void ppro_fill_in_addresses(struct op_msrs * const msrs)
int i;

for (i = 0; i < num_counters; i++) {
- if (!reserve_perfctr_nmi(MSR_P6_PERFCTR0 + i)) {
+ if (reserve_perfctr(i)) {
msrs->counters[i].addr = MSR_P6_PERFCTR0 + i;
msrs->controls[i].addr = MSR_P6_EVNTSEL0 + i;
}
@@ -192,7 +192,7 @@ static void ppro_shutdown(struct op_msrs const * const msrs)

for (i = 0; i < num_counters; ++i) {
if (msrs->counters[i].addr)
- release_perfctr_nmi(MSR_P6_PERFCTR0 + i);
+ release_perfctr(i);
}
if (reset_value) {
kfree(reset_value);
--
1.7.0


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Pages: 1
Prev: arch/powerpc/sysdev/cpm2_pic.h: Checkpatch cleanup
Next: [PATCH 4/9] tsc, x86: use new perfctr reservation functions in tsc code