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From: Chris Metcalf on 25 Jun 2010 17:20
This wasn't properly tested until the perf-event subsystem started
to get brought up under the tile architecture.

The bug caused bogus atomic64_cmpxchg() values to be returned,
among other things.

Signed-off-by: Chris Metcalf <cmetcalf(a)tilera.com>
---
arch/tile/lib/atomic_asm_32.S | 7 +++----
1 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/tile/lib/atomic_asm_32.S b/arch/tile/lib/atomic_asm_32.S
index c0d0585..5a5514b 100644
--- a/arch/tile/lib/atomic_asm_32.S
+++ b/arch/tile/lib/atomic_asm_32.S
@@ -89,11 +89,11 @@ STD_ENTRY_SECTION(__atomic\name, .text.atomic)
lh r22, r0
.else
lw r22, r0
- addi r23, r0, 4
+ addi r28, r0, 4
.endif
}
.ifc \bitwidth,64
- lw r23, r23
+ lw r23, r28
.endif
\body /* set r24, and r25 if 64-bit */
{
@@ -109,11 +109,10 @@ STD_ENTRY_SECTION(__atomic\name, .text.atomic)
sh r0, r24
.else
sw r0, r24
- addi r23, r0, 4
.endif
}
.ifc \bitwidth,64
- sw r23, r25
+ sw r28, r25
.endif
mf
3: {
--
1.6.5.2

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Prev: network driver dev/debugging (sis190/sis191)
Next: [PATCH] arch/tile: Split the icache flush code off to a generic <arch> header.