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From: Abdullah Muzahid on 22 Aug 2008 00:31
Hi,
I am trying to understand how virtually indexed, physically tagged
cache works. And I have some confusion.
Let just assume that page offset is 12 bit and virtual and physical
addresses are 32 bit. What will be the tag if the lower, say, 16 bits
of a virtual address are used to index the cache? Will it be 20 bit
physical page number or upper (32-16)=16 bit of physical page number?
Similarly, what will be the tag if the lower, say 8 bits of a virtual
address is used to index the cache?

Thanks.
-Abdullah
From: MitchAlsup on 22 Aug 2008 15:33
On Aug 21, 11:31 pm, Abdullah Muzahid <prince.cs...(a)gmail.com> wrote:
> Let just assume that page offset is 12 bit and virtual and physical
> addresses are 32 bit. What will be the tag if the lower, say, 16 bits
> of a virtual address are used to index the cache?

You have to check all physical bits that were not present in the
indexing
bits. Thus you need to check 32-12=20-bits. 16-of these are what
would
have been required with a PIPT cache, and the lower 4-bits are checked
becacuse these bits did not participate in the indexing fo the data
(i.e.
these bits change between virtual and physical addresses.)

Otherwise, software can guarentee that any shared page has the
property
that virtual address bits <15:12> are the same as physical address
bits
<15:12> and make the aliasing problem "go away".

Otherwise you will get yourself "hosed" somewhere along the line.



From: Nick Maclaren on 23 Aug 2008 08:28

In article <048c1d7b-76db-4585-9125-d9a9381237af(a)x35g2000hsb.googlegroups.com>,
MitchAlsup <MitchAlsup(a)aol.com> writes:
|> On Aug 21, 11:31pm, Abdullah Muzahid <prince.cs...(a)gmail.com> wrote:
|>
|> > Let just assume that page offset is 12 bit and virtual and physical
|> > addresses are 32 bit. What will be the tag if the lower, say, 16 bits
|> > of a virtual address are used to index the cache?
|>
|> You have to check all physical bits that were not present in the
|> indexing bits. Thus you need to check 32-12=20-bits. 16-of these
|> are what would have been required with a PIPT cache, and the lower
|> 4-bits are checked because these bits did not participate in the
|> indexing for the data (i.e. these bits change between virtual and
|> physical addresses.)

That is, of course, one reason that I regard the current approaches
to shared memory as misguided, at best. There are no problems with
virtual caches and a cleaner, simpler shared memory model - but that
would force programmers to face up to the fact that demanding fully
cache coherent shared memory costs a hell of a lot.

And doing that is, of course, unthinkable.


Regards,
Nick Maclaren.
From: MitchAlsup on 24 Aug 2008 13:21
On Aug 23, 7:28 am, n...(a)cus.cam.ac.uk (Nick Maclaren) wrote:
> That is, of course, one reason that I regard the current approaches
> to shared memory as misguided, at best.   There are no problems with
> virtual caches and a cleaner, simpler shared memory model - but that
> would force programmers to face up to the fact that demanding fully
> cache coherent shared memory costs a hell of a lot.
>
> And doing that is, of course, unthinkable.

Its not unthinkable, it just will never get past any sane
architectureal review board.

Mitch
From: Nick Maclaren on 25 Aug 2008 04:55

In article <91298b2b-e59e-415d-827a-26370cd99678(a)p25g2000hsf.googlegroups.com>,
MitchAlsup <MitchAlsup(a)aol.com> writes:
|>
|> > That is, of course, one reason that I regard the current approaches
|> > to shared memory as misguided, at best. There are no problems with
|> > virtual caches and a cleaner, simpler shared memory model - but that
|> > would force programmers to face up to the fact that demanding fully
|> > cache coherent shared memory costs a hell of a lot.
|> >
|> > And doing that is, of course, unthinkable.
|>
|> Its not unthinkable, it just will never get past any sane
|> architectureal review board.

I think that you have just confirmed my point!

What is unthinkable is the demonstrable fact that the current approaches
are not working, and cannot be made to work by any amount of tweaking.


Regards,
Nick Maclaren.
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