Survey: FPGA PCB layout
in [FPGA]
|
Prev: attached a 2nd peripheral to FSL bus. how to use it in software?
Next: XST design frequency setting
From: Joerg on 17 Apr 2008 21:31 Joel Koltner wrote: > "Joerg" <notthisjoergsch(a)removethispacbell.net> wrote in message > news:ZjRNj.9697$2g1.9469(a)nlpi068.nbdc.sbc.com... >> Not anymore. Part of my daily bread is earned salvaging designs where >> someone thought "Oh, it's just slow stuff". But it ain't grampa's old SN7400 >> anymore, today's logic chips are fast. > > OK, ok, good point. Doesn't someone now have a logic family that's purposely > been slowed down due to this "problem?" > There used to be but it's gone. They also had really high threshold voltages and stuff. >> And don't split that plane. But yes, often one has to make do with two-layer >> phenolic. That is often true art. > > From Thomas Lee (Stanford) in "Planar Microwave Engineering": > > In extremely low-cost consumer devices (e.g., toys, pocket radios, etc.), an > even less expensive board material is not infrequently encountered. Phenolic > is often a caramel brown, typically has an "organical chemical" odor, and is > remarkably lossy. Although phenolic is occasionally used for RF toys up to > 100MHz, it is totally insuitable for serious applications. It is mentioned > here simply to answer the question: "What is that cheap, malodorous board made > of?" > > :-) > > I know, I know, he's living in an ivory tower a bit, but he is one smart > cookie. > Errr, well, those sure sound like ivory tower statements. For some reason all the phenolic I ever used has never smelled. Unless something blew up on there, of course, but then FR4 will also let off a nasty stench. The new stuff looks amazingly similar to FR4, not dark brown. Remarkably lossy? Nah. I have proof to the contrary right here in the garage (if it's still there), a VHF/UHF TV splitter and 60ohm to 240ohm transformer where the UHF part is almost completely done in microstrip. Yes, microstrip on phenolic. There may be a fraction of a dB here and there but on short stretches that hardly matters. Usually those things are for outdoors so it's lacquer coated anyway. Phenolic is somewhat hygroscopic so you have to watch out for moisture. Totally insuitable for serious applications? Oh man. Let's see, what have we here? A 418MHz transmitter, several matching networks, a UHF receiver ... all on phenolic. Sometimes I wish that professors had more nose-to-the-grindstone industry work under the belt. I mean real design work where cost is a big factor. Otherwise they are going to tell students they should use Rogers for just about everything ... >> BTW does that little switcher work? > > I've had that board back for about a week, although I haven't actually tested > out the switcher yet since the DSP guy isn't interested in working with the > new (digital) board until the new RF board comes back (and gets tested) as > well, which is still a couple weeks out. (There's this "Big Tester Board" > that's needed to test the RF board and said BTB has spent something over a > week bouncing around engineering getting tweaked/fixed/etc... we'll be paying > a premium to actually get it fabbed in time to start testing RF boards at this > point, unfortunately :-( .) I can and probably should just put a dummy load > on the switcher, turn it on, and see if there's any obvious problems before > the DSP guy starts looking at his clock jitter. Tomorrow sounds like a good > day for that... > That would be good. Gives you a head start just in case there is a surprise ;-) -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: John Larkin on 17 Apr 2008 23:25 On Thu, 17 Apr 2008 09:43:09 -0700 (PDT), Dave <dhschetz(a)gmail.com> wrote: >Does anybody out there have a good methodology for determining your >optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? >The brute force method is fairly maddening. I'd be curious to hear if >anybody has any 'tricks of the trade' here. What's the brute force method? We preassign most fpga pins for clean, no-crossover routing to other chips. We discuss the general issues, especially placement, with our pcb layout guy and he actually decides which pins go where. Then he back-annotates the schematic and gives us a file we can use to create the fpga pin constraints file. Sometimes bank issues complicate the process, but it works pretty well. > >Also, just out of curiosity, how many of you do your own PCB layout, >versus farming it out? It would certainly save us a lot of money to >buy the tools and do it ourselves, but it seems like laying out a >board out well requires quite a bit of experience, especially a 6-8 >layer board with high pin count FPGA's. We'd never farm it out. We do critical mixed-signal stuff, and need to be near our layout guy constantly. He puts up a version on our server daily at least, and we keep an eye on progress. And we have a lot of mini-meetings to change the rules as needed. Besides, we have evolved some styles (and libraries!) that we couldn't very well transfer to a service bureau. PCB layout is too important to farm out. > >We're just setting up a hardware shop here, and although I've been >doing FPGA and board schematics design for a while, it's always been >at a larger company with resources to farm the layout out, and we >never did anything high-speed to really worry about the board layout >too much. Thanks in advance for your opinions. For really critical stuff, sometimes I'll take over and route that part of the board myself. It's just too hard to communicate exactly what I want. John
From: Andy Botterill on 18 Apr 2008 02:01 Joerg wrote: > Joel Koltner wrote: > > > Totally insuitable for serious applications? Oh man. Let's see, what > have we here? A 418MHz transmitter, several matching networks, a UHF > receiver ... all on phenolic. Multi ghz RF+matching stuff, analog and some digital will work on an FR4 derivative. > > Sometimes I wish that professors had more nose-to-the-grindstone > industry work under the belt. I mean real design work where cost is a > big factor. Otherwise they are going to tell students they should use > Rogers for just about everything ... Don't forget rogers is not perfect , intolerance to flexing and intolerant of poor soldering techniques. >
From: David L. Jones on 18 Apr 2008 03:09 On Apr 18, 8:15 am, Dave <dhsch...(a)gmail.com> wrote: > On Apr 17, 5:13 pm, "Steve" <sjbur...(a)comcast.net> wrote: > > > > > "Joerg" <notthisjoerg...(a)removethispacbell.net> wrote in message > > >news:U5MNj.6956$GE1.6193(a)nlpi061.nbdc.sbc.com... > > > > qrk wrote: > > >> On Thu, 17 Apr 2008 09:43:09 -0700 (PDT), Dave <dhsch...(a)gmail.com> > > >> wrote: > > > >>> Does anybody out there have a good methodology for determining your > > >>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? > > >>> The brute force method is fairly maddening. I'd be curious to hear if > > >>> anybody has any 'tricks of the trade' here. > > > >>> Also, just out of curiosity, how many of you do your own PCB layout, > > >>> versus farming it out? It would certainly save us a lot of money to > > >>> buy the tools and do it ourselves, but it seems like laying out a > > >>> board out well requires quite a bit of experience, especially a 6-8 > > >>> layer board with high pin count FPGA's. > > > >>> We're just setting up a hardware shop here, and although I've been > > >>> doing FPGA and board schematics design for a while, it's always been > > >>> at a larger company with resources to farm the layout out, and we > > >>> never did anything high-speed to really worry about the board layout > > >>> too much. Thanks in advance for your opinions. > > > >>> Dave > > > >> Sure wish there was a slick way of doing FPGA pinouts. I usually use > > >> graph paper and figure out the FPGA pinout to other parts to minimize > > >> routing snarls. > > > >> I do pcb layouts on my own and other folks designs. Our boards have > > >> high-speed routing, switching power supplies, and high-gain analog > > >> stuff; sometimes all on the same board. Unless the service bureau has > > >> someone who understands how to lay out such circuitry and place > > >> sensitive analog stuff near digital junk, it is more trouble to farm > > >> out than do it yourself if you want the board to work on the first > > >> cut. > > > > Or find a good layouter and develop a long-term business relationship. My > > > layouter knows just from looking at a schematic which areas are critical. > > > He's a lot older than I am and that is probably one of the reasons why his > > > stuff works without much assistance from me. Nothing can replace a few > > > decades of experience. > > > >> Doing your own layout will take a lot of learning to master the PCB > > >> layout program and what your board vendor can handle. It will take 5 > > >> to 10 complicated boards to become mildly proficient at layout. I > > >> don't know about saving cost. Your time may be better spent doing > > >> other activities rather than learning about layout and doing the > > >> layouts. ... > > > > Yep, that's why I usually do not do my own layouts. Occassionally I route > > > a small portion of a circuit and send that to my layouter. No DRC or > > > anything, just to show him how I'd like it done. > > > >> ... The upside to doing your own layout - you control the whole > > >> design from start to finish. If you have a challenging layout, you'll > > >> have a much higher probability of having a working board on the first > > >> try which has hidden savings (getting to market earlier <- less > > >> troubleshooting + less respins). > > > >> --- > > >> Mark > > > > -- > > > Regards, Joerg > > > >http://www.analogconsultants.com/ > > > > "gmail" domain blocked because of excessive spam. > > > Use another domain or send PM. > > > I agree with Joerg. Good high speed or mixed signal PCB layout is a career > > choice, and we electrical engineers already chose our career. A good layout > > requires someone who understands not just the software package, but the > > details of how the manufacturing operation is going to proceed, what the > > limits of the processes are, what the assembly operations require of the > > board, and is anal about things like footprint libraries and solder mask > > clearances and a thousand other details that I'm only partially aware of. > > The more complex your design, the more critical these things become. > > > I have two good local outfits for farming out boards. For complex stuff, > > they know I'll come to their place and sit next to the designer for a good > > bit of the initial placement. While we are doing placement, we are also > > discussing critical nets, routing paths, layer usage, etc. That gives us > > direct face to face communication and avoids spending lots of time trying to > > write/draw everything in gory detail (which gets ignored or misunderstood a > > lot of the time). That investment pays big dividends in schedule and board > > performance. > > > Don't be fooled by the relatively low cost of the software. That's not where > > the big costs are. > > > I once laid off my entire PCB layout department and sent all the work > > outside, because although my employees all knew how to use the software, > > none of them could tell me what their completion date would be, or how many > > hours it would take, and they certainly weren't interested in meeting > > schedules. The outside sources would commit to a cost and a delivery date. > > And we already knew they could meet our performance objectives. Fixed price > > contracts are great motivators. Missing an engineering test window, or > > slipping a production schedule because of a layout delay can be enormously > > expensive. > > > Of course, if I had let my engineers do their own layouts, the motivation > > would have been present, but the technical proficiency would not. How > > proficient can anyone become if they only do layout a few times a year? > > Also, on many projects engineers use the layout period for other important > > things like documentation, test procedures, writing test code, etc. Doing > > your own layout serializes these tasks and will stretch your schedule. > > > So my advice is to keep doing what you have been doing. Its far more likely > > that its the cheapest approach, even though you occasionally have to write a > > big check. > > > Steve > > I tend to agree with the 'farm-it-out' crowd. Unfortunately, my > current employer doesn't want to work with my previous layout people, > so I've been trying to search for a new partner. I've found plenty of > board fab and assembly places, but not so much on the layout. It made > me think that the rest of the world did their own layout. The opinions > look pretty split from the replies here, maybe it comes down to how > many times you do a layout each year, and how much you enjoy that sort > of work. I definitely think it's something you have to do fairly often > to keep your chops up. > > Andy, I'd also like to hear more about your pin-swap FPGA design flow > - what tools do that? Also curious about any timing issues that have > been caught after the pin-swap. In Altium Designer I use the incredibly useful "subnet jumper" feature for BGA's. The procedure goes something like this: 1) Fan out all the required FPGA pins first (automatically or manually) to just outside the chip boundry. (leave several diagonal entry paths for core and other power flood fills to get in) 2) Fully route all non-pin-swappable pins and other critical lines. 3) Ensure any other parts placements are near any required FPGA pins or block features you think you might need. 4) Route every track just short of the fanout tracks 5) Hit the "add subnet jumper" feature and it finishes the tracks and does all the pin swaps for you and updates the schematic. Probably needs a picture or two to explain it best though... The great part about subnet jumpers is if there are timing or other problems you can just remove the subnet jumpers and add/edit tracks and pins as needed and then replace the subnet jumpers. Only takes a minute or two. Dave.
From: Joerg on 18 Apr 2008 11:31
John Larkin wrote: > On Thu, 17 Apr 2008 09:43:09 -0700 (PDT), Dave <dhschetz(a)gmail.com> > wrote: > >> Does anybody out there have a good methodology for determining your >> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? >> The brute force method is fairly maddening. I'd be curious to hear if >> anybody has any 'tricks of the trade' here. > > What's the brute force method? We preassign most fpga pins for clean, > no-crossover routing to other chips. We discuss the general issues, > especially placement, with our pcb layout guy and he actually decides > which pins go where. Then he back-annotates the schematic and gives us > a file we can use to create the fpga pin constraints file. Sometimes > bank issues complicate the process, but it works pretty well. > >> Also, just out of curiosity, how many of you do your own PCB layout, >> versus farming it out? It would certainly save us a lot of money to >> buy the tools and do it ourselves, but it seems like laying out a >> board out well requires quite a bit of experience, especially a 6-8 >> layer board with high pin count FPGA's. > > We'd never farm it out. We do critical mixed-signal stuff, and need to > be near our layout guy constantly. He puts up a version on our server > daily at least, and we keep an eye on progress. And we have a lot of > mini-meetings to change the rules as needed. Besides, we have evolved > some styles (and libraries!) that we couldn't very well transfer to a > service bureau. PCB layout is too important to farm out. > I always farm out the layout. At the most I do a mock layout of, say, a hotrod RF amp area and send it to the layouter. During layout Gerbers go back and forth all the time, sometimes in 15min intervals. Once my layouter had to be in Vermont during the job, no problem. Crunch time, he worked into the night, I had a laptop in the living room and whenever it beeped I'd go into the office, check the Gerbers and reply. Also really nice was a company overseas. I only had to check some critical areas during layout (which was done over there). They used a subversion system so a scattered team could cooperate without accidentally stepping on each others files. It was almost as if their server was here in the basement. >> We're just setting up a hardware shop here, and although I've been >> doing FPGA and board schematics design for a while, it's always been >> at a larger company with resources to farm the layout out, and we >> never did anything high-speed to really worry about the board layout >> too much. Thanks in advance for your opinions. > > > For really critical stuff, sometimes I'll take over and route that > part of the board myself. It's just too hard to communicate exactly > what I want. > Yes, for really hot stuff it's good to sit next to each other. In the past I'd driver over there and me, the layouter and his cat would do the tough parts of the layout together. Unfortunately his cat has passed away by now. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM. |