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From: John Larkin on 20 Apr 2008 17:59 On Sun, 20 Apr 2008 17:33:16 -0400, "Michael A. Terrell" <mike.terrell(a)earthlink.net> wrote: > >John Larkin wrote: >> >> A quad opamp doesn't have 1738 pins! > > > That will only happen if Bloggs designs it. :( Bloggs has several times stated that he doesn't design electronics. He hasn't stated what he actually does. John
From: krw on 20 Apr 2008 19:31 In article <TlOOj.2407$I55.1437(a)newssvr22.news.prodigy.net>, notthisjoergsch(a)removethispacbell.net says... > John Larkin wrote: > > On Sat, 19 Apr 2008 14:17:44 -0700, Joerg > > <notthisjoergsch(a)removethispacbell.net> wrote: > > > >> Nico Coesel wrote: > >>> Dave <dhschetz(a)gmail.com> wrote: > >>> > >>>> Does anybody out there have a good methodology for determining your > >>>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? > >>>> The brute force method is fairly maddening. I'd be curious to hear if > >>>> anybody has any 'tricks of the trade' here. > >>> I start thinking about how the PCB should be routed the minute I start > >>> to draw a schematic. I always draw components with their actual > >>> pin-outs. This helps to group pins together and it helps to > >>> troubleshoot the circuit when the prototype is on your bench (no need > >>> to lookup the pinouts because they are in your diagram). > >>> > >> For quad opamps like the LM324 as well? That can make a schematic harder > >> to read and will also cause a nightmare if the layouter wants to swap > >> amp A with amp C and stuff like that. > >> > >> [...] > > > > A quad opamp doesn't have 1738 pins! > > > > Well, yes, I was just wondering about whether Nico really always draws > the physical package. Looks like he doesn't for smaller stuff. > > With 1738 pins you can only hope that the FPGA has enough routing > resources. That used to be a major pain in the early 90's. Don't know > about nowadays since other guys design the parts with the big FPGAs. And I had a *lot* of routing problems with the SpartanXL series. I had lotsa logic left but if it would route it would take days. I didn't have any problems, at the time, with Virtex or Vertex-E. Now the Virtex-2s and 4s route in a small number of minutes with no errors. > I am glad I don't have to deal with BGA, at least not with large ones ... I don't deal with them either. That's the layouter's job. ;-) Actually, right now I just work on what goes into them (though I had to completely redesign a badly screwed up board in December, which we *still* don't have back). -- Keith
From: Joerg on 20 Apr 2008 20:00 John Larkin wrote: > On Sun, 20 Apr 2008 14:13:21 -0700, Joerg > <notthisjoergsch(a)removethispacbell.net> wrote: > >> John Larkin wrote: >>> On Sat, 19 Apr 2008 14:17:44 -0700, Joerg >>> <notthisjoergsch(a)removethispacbell.net> wrote: >>> >>>> Nico Coesel wrote: >>>>> Dave <dhschetz(a)gmail.com> wrote: >>>>> >>>>>> Does anybody out there have a good methodology for determining your >>>>>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? >>>>>> The brute force method is fairly maddening. I'd be curious to hear if >>>>>> anybody has any 'tricks of the trade' here. >>>>> I start thinking about how the PCB should be routed the minute I start >>>>> to draw a schematic. I always draw components with their actual >>>>> pin-outs. This helps to group pins together and it helps to >>>>> troubleshoot the circuit when the prototype is on your bench (no need >>>>> to lookup the pinouts because they are in your diagram). >>>>> >>>> For quad opamps like the LM324 as well? That can make a schematic harder >>>> to read and will also cause a nightmare if the layouter wants to swap >>>> amp A with amp C and stuff like that. >>>> >>>> [...] >>> A quad opamp doesn't have 1738 pins! >>> >> Well, yes, I was just wondering about whether Nico really always draws >> the physical package. Looks like he doesn't for smaller stuff. >> >> With 1738 pins you can only hope that the FPGA has enough routing >> resources. That used to be a major pain in the early 90's. Don't know >> about nowadays since other guys design the parts with the big FPGAs. And >> I am glad I don't have to deal with BGA, at least not with large ones ... > > The biggest ones we use are Sparten 3's with 456 balls on 1 mm > centers. We haven't had any routing problems so far, doing pretty > complex stuff at 128 MHz clock rates. Our in-house BGA soldering > yield, to date, is exactly 100%. BGAs seem to be a lot easier to > solder reliably than fine-pitch leaded parts. Easier to inspect, too, > since you can't inspect them at all. > The latter is a concern in my field (medical). We need to be able to inspect. The other concern is involuntary board flexing. Most of my designs have to sustain under tortures such as freighter pilots ploughing through a storm in the Carribean in airplanes as old as a DC-3 or a trucker in Africa who is lead-footing it over a few hundred miles of washboard road. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
From: krw on 20 Apr 2008 22:20 In article <6PQOj.21063$%41.8783(a)nlpi064.nbdc.sbc.com>, notthisjoergsch(a)removethispacbell.net says... > John Larkin wrote: > > On Sun, 20 Apr 2008 14:13:21 -0700, Joerg > > <notthisjoergsch(a)removethispacbell.net> wrote: > > > >> John Larkin wrote: > >>> On Sat, 19 Apr 2008 14:17:44 -0700, Joerg > >>> <notthisjoergsch(a)removethispacbell.net> wrote: > >>> > >>>> Nico Coesel wrote: > >>>>> Dave <dhschetz(a)gmail.com> wrote: > >>>>> > >>>>>> Does anybody out there have a good methodology for determining your > >>>>>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? > >>>>>> The brute force method is fairly maddening. I'd be curious to hear if > >>>>>> anybody has any 'tricks of the trade' here. > >>>>> I start thinking about how the PCB should be routed the minute I start > >>>>> to draw a schematic. I always draw components with their actual > >>>>> pin-outs. This helps to group pins together and it helps to > >>>>> troubleshoot the circuit when the prototype is on your bench (no need > >>>>> to lookup the pinouts because they are in your diagram). > >>>>> > >>>> For quad opamps like the LM324 as well? That can make a schematic harder > >>>> to read and will also cause a nightmare if the layouter wants to swap > >>>> amp A with amp C and stuff like that. > >>>> > >>>> [...] > >>> A quad opamp doesn't have 1738 pins! > >>> > >> Well, yes, I was just wondering about whether Nico really always draws > >> the physical package. Looks like he doesn't for smaller stuff. > >> > >> With 1738 pins you can only hope that the FPGA has enough routing > >> resources. That used to be a major pain in the early 90's. Don't know > >> about nowadays since other guys design the parts with the big FPGAs. And > >> I am glad I don't have to deal with BGA, at least not with large ones ... > > > > The biggest ones we use are Sparten 3's with 456 balls on 1 mm > > centers. We haven't had any routing problems so far, doing pretty > > complex stuff at 128 MHz clock rates. Our in-house BGA soldering > > yield, to date, is exactly 100%. BGAs seem to be a lot easier to > > solder reliably than fine-pitch leaded parts. Easier to inspect, too, > > since you can't inspect them at all. > > > > The latter is a concern in my field (medical). We need to be able to > inspect. The other concern is involuntary board flexing. Most of my > designs have to sustain under tortures such as freighter pilots > ploughing through a storm in the Carribean in airplanes as old as a DC-3 > or a trucker in Africa who is lead-footing it over a few hundred miles > of washboard road. > X-Rays? -- Keith
From: John Larkin on 20 Apr 2008 22:42
On Sun, 20 Apr 2008 18:10:04 -0400, "Michael A. Terrell" <mike.terrell(a)earthlink.net> wrote: > >John Larkin wrote: >> >> On Sun, 20 Apr 2008 17:33:16 -0400, "Michael A. Terrell" >> <mike.terrell(a)earthlink.net> wrote: >> >> > >> >John Larkin wrote: >> >> >> >> A quad opamp doesn't have 1738 pins! >> > >> > >> > That will only happen if Bloggs designs it. :( >> >> Bloggs has several times stated that he doesn't design electronics. He >> hasn't stated what he actually does. > > > He stated that he does absolutely nothing. It might be the only time >he has ever told the truth. Sounds boring. No wonder he's usually bummed. John |