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From: amakyonin on 2 May 2010 18:14
Okay. I'll start out by saying that this is *not* a homework problem.
I'm trying to recreate some work I did many years ago which I
subsequently lost the notes and spreadsheet for.

My ultimate problem is to compute a reasonable estimate of the power
dissipated in a termination resistor as used in a typical digital
circuit. This is critical in determining an appropriate minimum
package size after consideration of derating requirements. My original
solution was applicable to both a source termination driving a CMOS
capacitive load or an RC termination at an input.

To this end I'm trying to determine the formula for the transient
response of an RC circuit when driven by a ramp function up until a
specified rise time. The typical textbook analysis only covers the
step response which produces an overly pessimistic estimate of power
dissipation. I have found some discussion online involving the
idealized unit ramp function but the formula presented have been
simplified due to the unitless ramp and don't provide any indication
on how to incorporate the rise time of the ramp for a real world
analysis.

With the voltage across the resistor described for both the ramp and
level portion of the input signal I can integrate the curves to get
the total power dissipated in the switching event. My original
analysis carried this forward to derive a formula that described the
maximum capacitance for various resistances and power limits.

While a relatively simple matter, my skills have unfortunately eroded
and for some reason there is no readily available discussion of this
topic. I would appreciate any assistance in resolving this problem.
From: Tim Wescott on 2 May 2010 19:44
amakyonin wrote:
> Okay. I'll start out by saying that this is *not* a homework problem.
> I'm trying to recreate some work I did many years ago which I
> subsequently lost the notes and spreadsheet for.
>
> My ultimate problem is to compute a reasonable estimate of the power
> dissipated in a termination resistor as used in a typical digital
> circuit. This is critical in determining an appropriate minimum
> package size after consideration of derating requirements. My original
> solution was applicable to both a source termination driving a CMOS
> capacitive load or an RC termination at an input.
>
> To this end I'm trying to determine the formula for the transient
> response of an RC circuit when driven by a ramp function up until a
> specified rise time. The typical textbook analysis only covers the
> step response which produces an overly pessimistic estimate of power
> dissipation. I have found some discussion online involving the
> idealized unit ramp function but the formula presented have been
> simplified due to the unitless ramp and don't provide any indication
> on how to incorporate the rise time of the ramp for a real world
> analysis.
>
> With the voltage across the resistor described for both the ramp and
> level portion of the input signal I can integrate the curves to get
> the total power dissipated in the switching event. My original
> analysis carried this forward to derive a formula that described the
> maximum capacitance for various resistances and power limits.
>
> While a relatively simple matter, my skills have unfortunately eroded
> and for some reason there is no readily available discussion of this
> topic. I would appreciate any assistance in resolving this problem.

How are you with Laplace domain stuff? I'll show you how I'd do it, and
you can tell me if it's over your head (I'm pretty facile with it, this
will look oddball to a lot of folks) or if it all makes sense now.

Unit ramp:

x(t) = t * u(t) ==> 1/s^2 (note that u(t) is the unit step function)

Rise to voltage V in time tr and keep right on going:

x(t) = (V/tr) * t * u(t) ==> (V/tr)/s^2

Rise to voltage V in time tr then stay steady:

x(t) = (V/tr) * (t * u(t) - (t - tr) * u(t - tr))
==> (V/tr) * (1 - e^(-tr * s)) / s^2)

Note that there's a freaking exponential in the numerator of our signal!
Don't let this confuse you -- what you want to do is calculate the
current through your resistor for the "rise and keep on rising" case,
then subtract a delayed version of it (which is what that exponential is
describing).

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com
From: George Herold on 3 May 2010 13:16
On May 2, 6:14 pm, amakyonin <amakyonin...(a)yahoo.com> wrote:
> Okay. I'll start out by saying that this is *not* a homework problem.
> I'm trying to recreate some work I did many years ago which I
> subsequently lost the notes and spreadsheet for.
>
> My ultimate problem is to compute a reasonable estimate of the power
> dissipated in a termination resistor as used in a typical digital
> circuit. This is critical in determining an appropriate minimum
> package size after consideration of derating requirements. My original
> solution was applicable to both a source termination driving a CMOS
> capacitive load or an RC termination at an input.
>
> To this end I'm trying to determine the formula for the transient
> response of an RC circuit when driven by a ramp function up until a
> specified rise time. The typical textbook analysis only covers the
> step response which produces an overly pessimistic estimate of power
> dissipation. I have found some discussion online involving the
> idealized unit ramp function but the formula presented have been
> simplified due to the unitless ramp and don't provide any indication
> on how to incorporate the rise time of the ramp for a real world
> analysis.
>
> With the voltage across the resistor described for both the ramp and
> level portion of the input signal I can integrate the curves to get
> the total power dissipated in the switching event. My original
> analysis carried this forward to derive a formula that described the
> maximum capacitance for various resistances and power limits.
>
> While a relatively simple matter, my skills have unfortunately eroded
> and for some reason there is no readily available discussion of this
> topic. I would appreciate any assistance in resolving this problem.

I'm not sure I get what you are trying to do. Is this correct? You
want to know the power dissipation in an RC circuit that is driven
with a step, but the step has a known slope. (your ramp time)

If that is correct then,
For ramp times that are much longer than the RC time the voltage
across the R will just follow the ramp. (you can ignore the C.)
For ramp times that are much less than the RC time then it's just the
step response and you can ignore the ramp time.
You are then left with only the intermediate case. For which you may
just want to use the ramp time... and ignore the slightly longer time
it takes to charge up the cap.

George H.
From: Tim Wescott on 3 May 2010 13:48
George Herold wrote:
> On May 2, 6:14 pm, amakyonin <amakyonin...(a)yahoo.com> wrote:
>> Okay. I'll start out by saying that this is *not* a homework problem.
>> I'm trying to recreate some work I did many years ago which I
>> subsequently lost the notes and spreadsheet for.
>>
>> My ultimate problem is to compute a reasonable estimate of the power
>> dissipated in a termination resistor as used in a typical digital
>> circuit. This is critical in determining an appropriate minimum
>> package size after consideration of derating requirements. My original
>> solution was applicable to both a source termination driving a CMOS
>> capacitive load or an RC termination at an input.
>>
>> To this end I'm trying to determine the formula for the transient
>> response of an RC circuit when driven by a ramp function up until a
>> specified rise time. The typical textbook analysis only covers the
>> step response which produces an overly pessimistic estimate of power
>> dissipation. I have found some discussion online involving the
>> idealized unit ramp function but the formula presented have been
>> simplified due to the unitless ramp and don't provide any indication
>> on how to incorporate the rise time of the ramp for a real world
>> analysis.
>>
>> With the voltage across the resistor described for both the ramp and
>> level portion of the input signal I can integrate the curves to get
>> the total power dissipated in the switching event. My original
>> analysis carried this forward to derive a formula that described the
>> maximum capacitance for various resistances and power limits.
>>
>> While a relatively simple matter, my skills have unfortunately eroded
>> and for some reason there is no readily available discussion of this
>> topic. I would appreciate any assistance in resolving this problem.
>
> I'm not sure I get what you are trying to do. Is this correct? You
> want to know the power dissipation in an RC circuit that is driven
> with a step, but the step has a known slope. (your ramp time)
>
> If that is correct then,
> For ramp times that are much longer than the RC time the voltage
> across the R will just follow the ramp. (you can ignore the C.)
> For ramp times that are much less than the RC time then it's just the
> step response and you can ignore the ramp time.
> You are then left with only the intermediate case. For which you may
> just want to use the ramp time... and ignore the slightly longer time
> it takes to charge up the cap.

Heh. I had my head stuck so deeply up my mathematics that the simple
solution didn't occur to me in my rather esoteric answer.

Of course this makes sense! Moreover, if you want more precision for
your "long ramp" case, the current in the resistor will simply rise
exponentially (per the time constant) then fall the same way -- and
probably won't make a significant difference.

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com
From: George Herold on 3 May 2010 21:33
On May 3, 1:48 pm, Tim Wescott <t...(a)seemywebsite.now> wrote:
> George Herold wrote:
> > On May 2, 6:14 pm, amakyonin <amakyonin...(a)yahoo.com> wrote:
> >> Okay. I'll start out by saying that this is *not* a homework problem.
> >> I'm trying to recreate some work I did many years ago which I
> >> subsequently lost the notes and spreadsheet for.
>
> >> My ultimate problem is to compute a reasonable estimate of the power
> >> dissipated in a termination resistor as used in a typical digital
> >> circuit. This is critical in determining an appropriate minimum
> >> package size after consideration of derating requirements. My original
> >> solution was applicable to both a source termination driving a CMOS
> >> capacitive load or an RC termination at an input.
>
> >> To this end I'm trying to determine the formula for the transient
> >> response of an RC circuit when driven by a ramp function up until a
> >> specified rise time. The typical textbook analysis only covers the
> >> step response which produces an overly pessimistic estimate of power
> >> dissipation. I have found some discussion online involving the
> >> idealized unit ramp function but the formula presented have been
> >> simplified due to the unitless ramp and don't provide any indication
> >> on how to incorporate the rise time of the ramp for a real world
> >> analysis.
>
> >> With the voltage across the resistor described for both the ramp and
> >> level portion of the input signal I can integrate the curves to get
> >> the total power dissipated in the switching event. My original
> >> analysis carried this forward to derive a formula that described the
> >> maximum capacitance for various resistances and power limits.
>
> >> While a relatively simple matter, my skills have unfortunately eroded
> >> and for some reason there is no readily available discussion of this
> >> topic. I would appreciate any assistance in resolving this problem.
>
> > I'm not sure I get what you are trying to do.  Is this correct?  You
> > want to know the power dissipation in an RC circuit that is driven
> > with a step, but the step has a known slope.  (your ramp time)
>
> > If that is correct then,
> > For ramp times that are much longer than the RC time the voltage
> > across the R will just follow the ramp.  (you can ignore the C.)
> > For ramp times that are much less than the RC time then it's just the
> > step response and you can ignore the ramp time.
> > You are then left with only the intermediate case.  For which you may
> > just want to use the ramp time... and ignore the slightly longer time
> > it takes to charge up the cap.
>
> Heh.  I had my head stuck so deeply up my mathematics that the simple
> solution didn't occur to me in my rather esoteric answer.
>
> Of course this makes sense!  Moreover, if you want more precision for
> your "long ramp" case, the current in the resistor will simply rise
> exponentially (per the time constant) then fall the same way -- and
> probably won't make a significant difference.
>
> --
> Tim Wescott
> Control system and signal processing consultingwww.wescottdesign.com- Hide quoted text -
>
> - Show quoted text -

Gee thanks Tim, When the two times are equal you might guess the
total time constant is something like twice.. If you need to know the
details then you need the hairy math. Though if this is used to pick
resistor sizes I'm a bit worried. I want all my resistors to be 2 or
3 times over-sized. 50% effects hardly matter.

George H.

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