Unfolded segment:offset 8086?
|
Prev: Help for Simplescalar's cache.c code
Next: Call for Papers: The2007 International Conference of Information Engineering (ICIE 2007)
From: spamtrap on 13 Jan 2007 19:50 Hello! I am an apprentice of the Intel 8086 CPU and its assembler language. I was thinking about maybe there existing an "unfolded segment:offset" version of the 8086 (NOT 80286, NOT 80386, NOT 80486, NOT Pentium, NOT Itanium, ...) The specs would be exactly the same as the good old 8086, same opcodes, same registers, nearly same transistor number, maybe more pins, and maybe 1 Ghz (maybe?), ... BUT with FULL 32bits segment:offset addressing model. Allowing 4GB of addressable memory at once, with the power and simplicity of the genuine, original Intel x86 processor. Greetings, Herman Samso room for space, ed for editor, delfin for beast, sunshine for sport, waitress for 6 ~~~~~~~~~~~~~~~~~*~~~~~ solO2
From: Jack Klein on 14 Jan 2007 01:01 On 13 Jan 2007 16:50:29 -0800, spamtrap(a)crayne.org wrote in comp.lang.asm.x86: > Hello! > > I am an apprentice of the Intel 8086 > CPU and its assembler language. > > I was thinking about maybe there > existing an "unfolded segment:offset" > version of the 8086 (NOT 80286, > NOT 80386, NOT 80486, NOT Pentium, > NOT Itanium, ...) What you want is not really possible... > The specs would be exactly the same > as the good old 8086, same opcodes, > same registers, nearly same transistor ....because with the same registers, you can't form 32-bit offsets, so you cannot get that second :32. > number, maybe more pins, and > maybe 1 Ghz (maybe?), ... > BUT with FULL 32bits segment:offset > addressing model. > > Allowing 4GB of addressable memory > at once, with the power and simplicity of > the genuine, original Intel x86 processor. The most you could get with base+index+displacement addressing would be 32:17.5, and you couldn't reach those displacements for code or stack. You need 32-bit registers (at least some for addressing) to reach 32:32. -- Jack Klein Home: http://JK-Technology.Com FAQs for comp.lang.c http://c-faq.com/ comp.lang.c++ http://www.parashift.com/c++-faq-lite/ alt.comp.lang.learn.c-c++ http://www.contrib.andrew.cmu.edu/~ajo/docs/FAQ-acllc.html
From: Rod Pemberton on 14 Jan 2007 03:03 <spamtrap(a)crayne.org> wrote in message news:1168735828.981138.107490(a)v45g2000cwv.googlegroups.com... > Hello! > > I am an apprentice of the Intel 8086 > CPU and its assembler language. > > I was thinking about maybe there > existing an "unfolded segment:offset" > version of the 8086 (NOT 80286, > NOT 80386, NOT 80486, NOT Pentium, > NOT Itanium, ...) > > The specs would be exactly the same > as the good old 8086, same opcodes, > same registers, nearly same transistor > number, maybe more pins, and > maybe 1 Ghz (maybe?), ... > BUT with FULL 32bits segment:offset > addressing model. > > Allowing 4GB of addressable memory > at once, with the power and simplicity of > the genuine, original Intel x86 processor. > Your options, as I know them: 1) 32-bit PM. This uses selector:offset instead of segment:offset, but gives a 4Gb address range since offset is 32-bits. However, you loose "simplicity", since some work is needed to switch to PM by creating the descriptors for each selector in the GDT. Unlike a segment which is added to the offset, a selector obtains a base address from the descriptor which is then added to offset. You would want to leave paging disabled, and set the base address to zero, and the segments to 32-bits and 4Gb. 2) "unreal" mode. This artificial mode goes by a number of different names, but unreal mode is the most common. This is 16-bit RM (Real Mode) with larger segments. To set the larger segments, a cpu whichs supports 32-bits and PM (Protected Mode), i.e. a 386 or better, is needed. You loose "simplicity" because you need to setup 32-bit PM just like in 1) even though you don't use 32-bit PM. x86 cpu modes: http://www.deinmeister.de/x86modes.htm "unreal" mode, i.e., "flat real mode" at bottom http://www.deinmeister.de/pmodeuse.htm 3) "Forreal" mode. One individual, Rick Hohensee, claims that there is an actual 32-bit RM supported by all 386+ Intel/AMD cpu's. I can neither confirm nor deny his claim. Unfortunately, he uses somewhat cryptic language to discuss this. The first link is his, the second is mine where I made an honest attempt to understand whatever it what he was talking about... Of course, you'd still need a 32-bit PM cpu and, if he's correct, switching to "Forreal" mode lacks "simplicity" also. http://groups.google.com/group/comp.lang.forth/msg/7a27652cd0239969?hl=en http://groups.google.com/group/comp.lang.forth/msg/c47719d209d19832?hl=en He's had a number of such conversations on this with various people. You can search for them by entering "forreal mode", without quotes, into the exact phrase box of Google's Group search: http://groups.google.com/advanced_search?hl=en Rod Pemberton
From: Yousuf Khan on 14 Jan 2007 19:07 spamtrap(a)crayne.org wrote: > Hello! > > I am an apprentice of the Intel 8086 > CPU and its assembler language. > > I was thinking about maybe there > existing an "unfolded segment:offset" > version of the 8086 (NOT 80286, > NOT 80386, NOT 80486, NOT Pentium, > NOT Itanium, ...) > > The specs would be exactly the same > as the good old 8086, same opcodes, > same registers, nearly same transistor > number, maybe more pins, and > maybe 1 Ghz (maybe?), ... > BUT with FULL 32bits segment:offset > addressing model. > > Allowing 4GB of addressable memory > at once, with the power and simplicity of > the genuine, original Intel x86 processor. Starting with the 386, there was an undocumented special Real Mode, often called "Unreal Mode". Basically what it does is use the fact that if you want to switch from Protected Mode back to Real Mode, you have to actually setup segment descriptors (just like in Protected Mode) that match the defaults of the Real Mode segment properties. If you decide to play around with the segment descriptor entries so that they don't look just like good old Real Mode, your new Real Mode will take on the characteristics of whatever you've setup in the segment descriptor. Yousuf Khan
From: Ed Beroset on 15 Jan 2007 08:24
Yousuf Khan wrote: > spamtrap(a)crayne.org wrote: > >> Allowing 4GB of addressable memory >> at once, with the power and simplicity of >> the genuine, original Intel x86 processor. > > Starting with the 386, there was an undocumented special Real Mode, > often called "Unreal Mode". Basically what it does is use the fact that > if you want to switch from Protected Mode back to Real Mode, you have to > actually setup segment descriptors (just like in Protected Mode) that > match the defaults of the Real Mode segment properties. Another common name for that is "flat real mode." Source code showing how to do this in assembly language is available here: http://www.beroset.com/flatmode.asm > If you decide to > play around with the segment descriptor entries so that they don't look > just like good old Real Mode, your new Real Mode will take on the > characteristics of whatever you've setup in the segment descriptor. That's true. If you look carefully at the settings in the program described above, you'll see that it's set for read only access. That isn't necessary of course, but it was done to illustrate that other aspects of the segment descriptor also remain in effect. Ed |