Weird Behaviour of Blackfin BF533 cache !!!!!!!!!!!!!!
in [DSP]
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From: Vladimir Vassilevsky on 6 May 2008 06:14 rajesh wrote: > On May 6, 9:21 am, rajesh <getrajes...(a)gmail.com> wrote: >>On May 6, 2:13 am, Vladimir Vassilevsky <antispam_bo...(a)hotmail.com> >>>rajesh wrote: >>> >>>>I was working on implementation of h.264 algorithm on Blackfin a >>>>couple of years back. I had used the elegantly made DMA of the >>>>processor to move data in and out of the internal memory (specially >>>>during de-blocking) and i was competing with the cache in terms of >>>>cycles.So I had a chance to experiment with the cache. >> >>>BlackFin doesn't have any means for providing cache and DMA coherency. >>>Hence you generally can't DMA to the memory areas which are covered by >>>cache. >>>You are a muddle headed. Learn hardware. >> >>I have used an instruction to invalidate cache after dma >>transfer. > > > FYI > > iflush [ p2 ] ; /* Invalidate cache line containing address that > P2 points to */ FYI, muddle head: 1. iflush should be used before DMA transfer, not after. 2. iflush is useless, since it is faster to DMA to/from buffer in L1 and copy the data between external memory (cached) and that buffer. 3. Learn hardware. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com
From: rajesh on 6 May 2008 06:22 On May 6, 3:14 pm, Vladimir Vassilevsky <antispam_bo...(a)hotmail.com> wrote: > rajesh wrote: > > On May 6, 9:21 am, rajesh <getrajes...(a)gmail.com> wrote: > >>On May 6, 2:13 am, Vladimir Vassilevsky <antispam_bo...(a)hotmail.com> > >>>rajesh wrote: > > >>>>I was working on implementation of h.264 algorithm on Blackfin a > >>>>couple of years back. I had used the elegantly made DMA of the > >>>>processor to move data in and out of the internal memory (specially > >>>>during de-blocking) and i was competing with the cache in terms of > >>>>cycles.So I had a chance to experiment with the cache. > > >>>BlackFin doesn't have any means for providing cache and DMA coherency. > >>>Hence you generally can't DMA to the memory areas which are covered by > >>>cache. > >>>You are a muddle headed. Learn hardware. > > >>I have used an instruction to invalidate cache after dma > >>transfer. > > > FYI > > > iflush [ p2 ] ; /* Invalidate cache line containing address that > > P2 points to */ > > FYI, muddle head: > > 1. iflush should be used before DMA transfer, not after. > > 2. iflush is useless, since it is faster to DMA to/from buffer in L1 and > copy the data between external memory (cached) and that buffer. > > 3. Learn hardware. > > Vladimir Vassilevsky > DSP and Mixed Signal Design Consultanthttp://www.abvolt.com I have not said that i have used the above instruction..there are a few other instructions which i am not able to recall. You can invalidate the entire cache at one shot. I have used DMA and cache simultaneously and demonstrated the gain of DMA over cache especially when the data acess is sequencial in memory. This happens when one is accessing pixels of a 2-d image. And lastly I didnt get what you mean by 'Hardware'.
From: rajesh on 6 May 2008 06:24 On May 6, 3:14 pm, Vladimir Vassilevsky <antispam_bo...(a)hotmail.com> wrote: > rajesh wrote: > > On May 6, 9:21 am, rajesh <getrajes...(a)gmail.com> wrote: > >>On May 6, 2:13 am, Vladimir Vassilevsky <antispam_bo...(a)hotmail.com> > >>>rajesh wrote: > > >>>>I was working on implementation of h.264 algorithm on Blackfin a > >>>>couple of years back. I had used the elegantly made DMA of the > >>>>processor to move data in and out of the internal memory (specially > >>>>during de-blocking) and i was competing with the cache in terms of > >>>>cycles.So I had a chance to experiment with the cache. > > >>>BlackFin doesn't have any means for providing cache and DMA coherency. > >>>Hence you generally can't DMA to the memory areas which are covered by > >>>cache. > >>>You are a muddle headed. Learn hardware. > > >>I have used an instruction to invalidate cache after dma > >>transfer. > > > FYI > > > iflush [ p2 ] ; /* Invalidate cache line containing address that > > P2 points to */ > > FYI, muddle head: > > 1. iflush should be used before DMA transfer, not after. > > 2. iflush is useless, since it is faster to DMA to/from buffer in L1 and > copy the data between external memory (cached) and that buffer. > > 3. Learn hardware. > > Vladimir Vassilevsky > DSP and Mixed Signal Design Consultanthttp://www.abvolt.com "BlackFin doesn't have any means for providing cache and DMA coherency. Hence you generally can't DMA to the memory areas which are covered by cache. " who said this?
From: Vladimir Vassilevsky on 6 May 2008 06:31 rajesh wrote: > "BlackFin doesn't have any means for providing cache and DMA > coherency. > Hence you generally can't DMA to the memory areas which are covered by > cache. " > > who said this? Hint: cache snooping Go learn hardware, bad pupil. VLV
From: Vladimir Vassilevsky on 6 May 2008 06:38 > I have not said that i have used the above instruction..there are a > few other instructions which i am not able to recall. Excuses, excuses, always excuses. > > You can invalidate the entire cache at one shot. Bad idea anyway. > I have used DMA and > cache simultaneously and demonstrated the > gain of DMA over cache especially when the data acess is sequencial > in memory. Nonsense. > This happens when > one is accessing pixels of a 2-d image. This happens when one has a muddle head. > And lastly I didnt get what you mean by 'Hardware'. LOL VLV
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