Which type of volatile RAM has the least duration of data remanence when power-offed?
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From: Jim Thompson on 14 May 2010 18:41 On Fri, 14 May 2010 18:12:15 -0400, Jerry Avins <jya(a)ieee.org> wrote: >On 5/14/2010 5:23 PM, Eric Jacobsen wrote: >> On 5/14/2010 2:11 PM, Steve Pope wrote: >>> GreenXenon<glucegen1x(a)gmail.com> wrote: >>> >>>> Twin-Transistor RAM does not contain capacitors >>>> >>>> http://en.wikipedia.org/wiki/Twin_Transistor_RAM quote: >>>> >>>> "TTRAM is similar to conventional one-transistor, one-capacitor DRAM >>>> in concept, but eliminates the capacitor by relying on the floating >>>> body effect inherent in a silicon on insulator (SOI) manufacturing >>>> process." >>> >>> Jeez, so it is storing charge on parasitic capacitors. >>> >>> Steve >> >> He's not getting that's it not possible to build semiconductor circuits >> without capacitance. > >I can draw a circuit diagram without capacitors, so why can't I build >the circuit? > >Jerry Jerry, Methinks you "chain-yank" :-) Every junction or gate overlay has capacitance... whether you "draw" it or not. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | The only thing bipartisan in this country is hypocrisy
From: JosephKK on 16 May 2010 21:00 On Fri, 14 May 2010 15:41:34 -0700, Jim Thompson <To-Email-Use-The-Envelope-Icon(a)On-My-Web-Site.com> wrote: >On Fri, 14 May 2010 18:12:15 -0400, Jerry Avins <jya(a)ieee.org> wrote: > >>On 5/14/2010 5:23 PM, Eric Jacobsen wrote: >>> On 5/14/2010 2:11 PM, Steve Pope wrote: >>>> GreenXenon<glucegen1x(a)gmail.com> wrote: >>>> >>>>> Twin-Transistor RAM does not contain capacitors >>>>> >>>>> http://en.wikipedia.org/wiki/Twin_Transistor_RAM quote: >>>>> >>>>> "TTRAM is similar to conventional one-transistor, one-capacitor DRAM >>>>> in concept, but eliminates the capacitor by relying on the floating >>>>> body effect inherent in a silicon on insulator (SOI) manufacturing >>>>> process." >>>> >>>> Jeez, so it is storing charge on parasitic capacitors. >>>> >>>> Steve >>> >>> He's not getting that's it not possible to build semiconductor circuits >>> without capacitance. >> >>I can draw a circuit diagram without capacitors, so why can't I build >>the circuit? >> >>Jerry > >Jerry, Methinks you "chain-yank" :-) > >Every junction or gate overlay has capacitance... whether you "draw" >it or not. > > ...Jim Thompson JT from plenty of previous experience elsewhere JA _is_ one of the good.
From: Jim Thompson on 16 May 2010 21:34 On Sun, 16 May 2010 18:00:55 -0700, "JosephKK"<quiettechblue(a)yahoo.com> wrote: >On Fri, 14 May 2010 15:41:34 -0700, Jim Thompson ><To-Email-Use-The-Envelope-Icon(a)On-My-Web-Site.com> wrote: > >>On Fri, 14 May 2010 18:12:15 -0400, Jerry Avins <jya(a)ieee.org> wrote: >> >>>On 5/14/2010 5:23 PM, Eric Jacobsen wrote: >>>> On 5/14/2010 2:11 PM, Steve Pope wrote: >>>>> GreenXenon<glucegen1x(a)gmail.com> wrote: >>>>> >>>>>> Twin-Transistor RAM does not contain capacitors >>>>>> >>>>>> http://en.wikipedia.org/wiki/Twin_Transistor_RAM quote: >>>>>> >>>>>> "TTRAM is similar to conventional one-transistor, one-capacitor DRAM >>>>>> in concept, but eliminates the capacitor by relying on the floating >>>>>> body effect inherent in a silicon on insulator (SOI) manufacturing >>>>>> process." >>>>> >>>>> Jeez, so it is storing charge on parasitic capacitors. >>>>> >>>>> Steve >>>> >>>> He's not getting that's it not possible to build semiconductor circuits >>>> without capacitance. >>> >>>I can draw a circuit diagram without capacitors, so why can't I build >>>the circuit? >>> >>>Jerry >> >>Jerry, Methinks you "chain-yank" :-) >> >>Every junction or gate overlay has capacitance... whether you "draw" >>it or not. >> >> ...Jim Thompson > >JT from plenty of previous experience elsewhere JA _is_ one of the good. I thought so, that's why I said "chain-yank". Jerry was playing with the paisano's :-) ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | The only thing bipartisan in this country is hypocrisy
From: JosephKK on 18 May 2010 00:17
On Sun, 16 May 2010 18:34:00 -0700, Jim Thompson <To-Email-Use-The-Envelope-Icon(a)On-My-Web-Site.com> wrote: >On Sun, 16 May 2010 18:00:55 -0700, >"JosephKK"<quiettechblue(a)yahoo.com> wrote: > >>On Fri, 14 May 2010 15:41:34 -0700, Jim Thompson >><To-Email-Use-The-Envelope-Icon(a)On-My-Web-Site.com> wrote: >> >>>On Fri, 14 May 2010 18:12:15 -0400, Jerry Avins <jya(a)ieee.org> wrote: >>> >>>>On 5/14/2010 5:23 PM, Eric Jacobsen wrote: >>>>> On 5/14/2010 2:11 PM, Steve Pope wrote: >>>>>> GreenXenon<glucegen1x(a)gmail.com> wrote: >>>>>> >>>>>>> Twin-Transistor RAM does not contain capacitors >>>>>>> >>>>>>> http://en.wikipedia.org/wiki/Twin_Transistor_RAM quote: >>>>>>> >>>>>>> "TTRAM is similar to conventional one-transistor, one-capacitor DRAM >>>>>>> in concept, but eliminates the capacitor by relying on the floating >>>>>>> body effect inherent in a silicon on insulator (SOI) manufacturing >>>>>>> process." >>>>>> >>>>>> Jeez, so it is storing charge on parasitic capacitors. >>>>>> >>>>>> Steve >>>>> >>>>> He's not getting that's it not possible to build semiconductor circuits >>>>> without capacitance. >>>> >>>>I can draw a circuit diagram without capacitors, so why can't I build >>>>the circuit? >>>> >>>>Jerry >>> >>>Jerry, Methinks you "chain-yank" :-) >>> >>>Every junction or gate overlay has capacitance... whether you "draw" >>>it or not. >>> >>> ...Jim Thompson >> >>JT from plenty of previous experience elsewhere JA _is_ one of the good. > >I thought so, that's why I said "chain-yank". Jerry was playing with >the paisano's :-) > > ...Jim Thompson I missed the whoosh. |