Xilinx Pipelined/Streaming FFT Architecure?
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From: onkars on 5 Apr 2010 18:14 Hi, Can someone tell what is the architecture used by Xilinx Pipelined/Streaming FFT cores? Is it R2SDF or R2-squared SDF or something else? Regards, Onkar
From: onkars on 6 Apr 2010 10:35 Hey people .... can anyone help? >Hi, > >Can someone tell what is the architecture used by Xilinx >Pipelined/Streaming FFT cores? Is it R2SDF or R2-squared SDF or something >else? > >Regards, >Onkar >
From: onkars on 6 Apr 2010 11:53 Hey people .... can anyone help? >Hi, > >Can someone tell what is the architecture used by Xilinx >Pipelined/Streaming FFT cores? Is it R2SDF or R2-squared SDF or something >else? > >Regards, >Onkar >
From: Impoliticus on 6 Apr 2010 18:46 I don't know myself, but you might be able to look at the resource utilization to reverse engineer the architecture. For example, I think the R2^2SDF should have 1/2 the multipliers as the R2SDF for FFT lengths that are a power of 4.
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