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From: MSC on 2 Feb 2005 21:10 On 2 Feb 2005 10:59:11 -0800, "ethan" <ethan.bordeaux(a)gmail.com> wrote: >thanks for the reply! Just in case you aren't aware, Circuit Cellar issue 174 has an article on using the 1MIP ADuC812 as a digital filter. Unfortunately their single channel FIR/IIR filter has a Nyquist limit of 250Hz. The slow multiply instruction seems to cripple it somewhat. Mike
From: ethan on 3 Feb 2005 10:11 > Then start with the F330, and get it operating. If you have some time > headroom, but need more flash, the ADI family has obvious appeal to you... > If when you are finished, you find more speed would help, > look at the upcomming C8051F410. 66MHz core, Dual 12 bit DACs, > up to 32K Flash, wide Vcc > > http://www.eltis.kiev.ua/pdf/C8051F410_short.pdf > > Perhaps include a SO8 SPI memory option, as the newest ones can read > continually up to 50MHz, and give some MBytes of storage. > > -jg wow the 410 looks great! too bad it doesn't seem to exist quite yet. any idea when this will be in production? the advance datasheet is dated almost a year ago (assuming they use DD/MM/YYYY nomenclature) - not that that really means anything in the world of microprocessor design!
From: Raivo Leini on 4 Feb 2005 16:27
"Mark Borgerson" <mborgerson(a)comcast.net> wrote in message > Yes, this chore is something that many MCUs with a hardware PWM > capability could handle. Changing the output voltage then becomes a > matter of storing the new value in a register. > > > The output sample rate is then limited by the timer clock rate and > the number of bits resolution. For a timer with an 8MHz clock and > 8 bits output resolution, the PWM period is 256 cycles, or > about 31,250 steps per second. That, and the acceptable > distortion, will limit your maximum output frequency. Somewhere ( Fujitsu ? ) was application note about using 2 PWM channels to get 16 bit resolution, "extra" hardware has 2 resistors, R for high byte pwm channel and 256*R for low byte. r. |