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From: Jeremy Fitzhardinge on 18 Jun 2008 20:40
Linus Torvalds wrote:
> On Wed, 18 Jun 2008, Jeremy Fitzhardinge wrote:
>
>> Along the lines of:
>>
>
> Hell no. There's a reason we have a special set_wrprotect() thing. We can
> do it more efficiently on native hardware by just clearing the bit
> atomically. No need to do the cmpxchg games.
>

It's not cmpxchg, just xchg.

In other words, is:

lock btr $_PAGE_BIT_RW, (%rbx)

much cheaper than

mov $0, %rax
xchg %rax, (%rbx)
and $~_PAGE_RW, %rax
mov %rax, (%rbx)

?

It's the same number of locked RMW operations, so aside from being a few
instructions longer, I think it would be much the same.

I guess the correct answer is "lmbench".

J
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From: Akinobu Mita on 19 Jun 2008 08:30
> Below is the commit, it needed a small amount of massaging to apply the
> void * -> unsigned long * change in the x86/bitops topic.

So you need to change this line

> +#define CONST_MASK_ADDR BITOP_ADDR(addr + (nr>>3))

to be

#define CONST_MASK_ADDR BITOP_ADDR((void *)addr + (nr>>3))

or something like this. Otherwise it will get wrong address in set_bit

> -static inline void set_bit(int nr, volatile unsigned long *addr)
> +static inline void set_bit(unsigned int nr, volatile unsigned long *addr)
> {
> - asm volatile(LOCK_PREFIX "bts %1,%0" : ADDR : "Ir" (nr) : "memory");
> + if (IS_IMMEDIATE(nr))
> + asm volatile(LOCK_PREFIX "orb %1,%0" : CONST_MASK_ADDR : "i" (CONST_MASK) : "memory");
> + else
> + asm volatile(LOCK_PREFIX "bts %1,%0" : ADDR : "Ir" (nr) : "memory");
> }
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From: Jeremy Fitzhardinge on 20 Jun 2008 16:20
Linus Torvalds wrote:
> On Fri, 20 Jun 2008, Ingo Molnar wrote:
>
>> okay - Jeremy, could you try the fix below? (or tip/master, i just
>> pushed this out)
>>
>
> Actually, don't try that one.
>
> It needs to be a _byte_ registers, so "ir" was wrong. You need "iq".
>

Doesn't work, unfortunately:
{standard input}:20511: Error: Incorrect register `%eax' used with `b'
suffix

lock; orb %eax,1(%rdi) # tmp64,

J
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From: Jeremy Fitzhardinge on 20 Jun 2008 16:40
Jeremy Fitzhardinge wrote:
> Linus Torvalds wrote:
>
>> On Fri, 20 Jun 2008, Ingo Molnar wrote:
>>
>>
>>> okay - Jeremy, could you try the fix below? (or tip/master, i just
>>> pushed this out)
>>>
>>>
>> Actually, don't try that one.
>>
>> It needs to be a _byte_ registers, so "ir" was wrong. You need "iq".
>>
>>
>
> Doesn't work, unfortunately:
> {standard input}:20511: Error: Incorrect register `%eax' used with `b'
> suffix
>
> lock; orb %eax,1(%rdi) # tmp64,
>

This does work:

asm volatile(LOCK_PREFIX "orb %1,%0"
: CONST_MASK_ADDR(nr, addr)
: "iq" ((u8)CONST_MASK(nr))
: "memory");

(ie, explicitly casting the mask to u8)

J
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