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From: Sascha Hauer on 3 Feb 2010 04:50
On Tue, Feb 02, 2010 at 10:29:50PM -0800, Eric Miao wrote:
> On Tue, Feb 2, 2010 at 9:16 PM, Amit Kucheria
> <amit.kucheria(a)canonical.com> wrote:
> > i.MX51 defines 4 values:
> >
> > 00: Low Drive Strength
> > 01: Medium Drive Strength
> > 10: High Drive Strength
> > 11: Max Drive Strength
> >
> > Signed-off-by: Amit Kucheria <amit.kucheria(a)canonical.com>
> > ---
> > �arch/arm/plat-mxc/include/mach/iomux-v3.h | � �8 +++++---
> > �1 files changed, 5 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
> > index 1deda01..f2f73d3 100644
> > --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
> > +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
> > @@ -81,11 +81,13 @@ struct pad_desc {
> >
> > �#define PAD_CTL_ODE � � � � � � � � � �(1 << 3)
> >
> > -#define PAD_CTL_DSE_STANDARD � � � � � (0 << 1)
> > -#define PAD_CTL_DSE_HIGH � � � � � � � (1 << 1)
> > -#define PAD_CTL_DSE_MAX � � � � � � � � � � � �(2 << 1)
> > +#define PAD_CTL_DSE_LOW � � � � � � � � � � � �(0 << 1)
> > +#define PAD_CTL_DSE_MED � � � � � � � � � � � �(1 << 1)
> > +#define PAD_CTL_DSE_HIGH � � � � � � � (2 << 1)
> > +#define PAD_CTL_DSE_MAX � � � � � � � � � � � �(3 << 1)
> >
>
> I'm seeing some changes in recent kernel with introduction of PAD_CTL_DRV_*,
> which also affects mx3, think it's a tough problem to keep backward
> compatibility
> now, one way out is to introduce maybe PAD_CTL_DRV_EXTREME specifically
> for imx51.

Given that the values are the same on i.MX3 and i.MX51 we could also
do a

#define PAD_CTL_DSE(x) ((x) << 1)

and add a comment for allowed values 0..2 for i.MX3 and 0..3 for i.MX51.

Sascha


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