oprofile, perf, x86: introduce new functions to reserve perfctrs by index
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From: Andi Kleen on 20 Mar 2010 01:50 Robert Richter <robert.richter(a)amd.com> writes: > Current perfctr reservation code allocates single pmu msrs. The msr > addresses may differ depending on the model and offset calculation is > necessary. This can be easier implemented by reserving a counter by > its index only. Sorry reviewing old patch. This doesn't work for the fixed counters on intel, which don't have a index (or rather they have a separate number space) I had a old patch to fix the reservation for them (and a matching patch to perf to use it). How to resolve this? -Andi --- --- arch/x86/kernel/cpu/perfctr-watchdog.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) Index: linux-2.6.32-ak/arch/x86/kernel/cpu/perfctr-watchdog.c =================================================================== --- linux-2.6.32-ak.orig/arch/x86/kernel/cpu/perfctr-watchdog.c +++ linux-2.6.32-ak/arch/x86/kernel/cpu/perfctr-watchdog.c @@ -70,9 +70,13 @@ static inline unsigned int nmi_perfctr_m case X86_VENDOR_AMD: return msr - MSR_K7_PERFCTR0; case X86_VENDOR_INTEL: - if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) + if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) { + if (msr >= MSR_CORE_PERF_FIXED_CTR0 && + msr < MSR_CORE_PERF_FIXED_CTR0 + 8) + return NMI_MAX_COUNTER_BITS - + (msr - MSR_CORE_PERF_FIXED_CTR0); return msr - MSR_ARCH_PERFMON_PERFCTR0; - + } switch (boot_cpu_data.x86) { case 6: return msr - MSR_P6_PERFCTR0; -- ak(a)linux.intel.com -- Speaking for myself only. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
From: Andi Kleen on 25 Mar 2010 15:40
On Thu, Mar 25, 2010 at 04:52:08PM +0100, Robert Richter wrote: > Andi, > > so far it does not seem this reservation patches will go upstream. So > we still do not have a solution of how to share the pmu with perf. The There's the current reservation code which has some issues and is butt ugly, but does its job mostly. The only real problem I have with it is that it doesn't support fixed counters. That's not very hard to fix (patches posted), but of course requires some basic cooperation from impartial maintainers. I think extending it to other registers shouldn't also be that hard. > current approach is a global pmu lock. I don't think this is a good > solution and we already see questions on the oprofile mailing list why > counters are not available to use. This will become much worse if perf > is using counters permanently in the kernel (e.g. the perf nmi > watchdog). This will make oprofile unusable. NMI watchdog is not on by default luckily. Anyways I don't really understand what the problem with just allocating counters properly in perf_events like everyone else. They need to do that anyways to cooperate with firmware or VMs using these counters. -Andi -- ak(a)linux.intel.com -- Speaking for myself only. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ |