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From: Suresh Siddha on 19 Jul 2010 19:10
Add cpu feature bit support for the XSAVEOPT instruction.

Signed-off-by: Suresh Siddha <suresh.b.siddha(a)intel.com>
---
arch/x86/include/asm/cpufeature.h | 1 +
1 file changed, 1 insertion(+)

Index: tip-linux-2.6/arch/x86/include/asm/cpufeature.h
===================================================================
--- tip-linux-2.6.orig/arch/x86/include/asm/cpufeature.h
+++ tip-linux-2.6/arch/x86/include/asm/cpufeature.h
@@ -165,6 +165,7 @@
#define X86_FEATURE_ARAT (7*32+ 1) /* Always Running APIC Timer */
#define X86_FEATURE_CPB (7*32+ 2) /* AMD Core Performance Boost */
#define X86_FEATURE_EPB (7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */
+#define X86_FEATURE_XSAVEOPT (7*32+4) /* "xsaveopt" Optimized Xsave */

/* Virtualization flags: Linux defined, word 8 */
#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */


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Next: [patch 2/5] x86: sync xsave memory layout with its header for user handling