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From: Peter Zijlstra on 1 Jul 2010 11:50
On Thu, 2010-07-01 at 17:35 +0200, Frederic Weisbecker wrote:
> - Most archs use one callchain buffer per cpu, except x86 that needs
> to deal with NMIs. Provide a default perf_callchain_buffer()
> implementation that x86 overrides.

sparc and power also have NMI like contexts.
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From: Frederic Weisbecker on 1 Jul 2010 11:50
On Thu, Jul 01, 2010 at 05:46:01PM +0200, Peter Zijlstra wrote:
> On Thu, 2010-07-01 at 17:35 +0200, Frederic Weisbecker wrote:
> > - Most archs use one callchain buffer per cpu, except x86 that needs
> > to deal with NMIs. Provide a default perf_callchain_buffer()
> > implementation that x86 overrides.
>
> sparc and power also have NMI like contexts.


Ah and the comments suggest it's because pmu interrupts can't nest or so.
Anyway, that's notwithstanding the race that 5th patch fixes.

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From: Frederic Weisbecker on 1 Jul 2010 12:00
On Thu, Jul 01, 2010 at 05:51:22PM +0200, Peter Zijlstra wrote:
> On Thu, 2010-07-01 at 17:49 +0200, Frederic Weisbecker wrote:
> > On Thu, Jul 01, 2010 at 05:46:01PM +0200, Peter Zijlstra wrote:
> > > On Thu, 2010-07-01 at 17:35 +0200, Frederic Weisbecker wrote:
> > > > - Most archs use one callchain buffer per cpu, except x86 that needs
> > > > to deal with NMIs. Provide a default perf_callchain_buffer()
> > > > implementation that x86 overrides.
> > >
> > > sparc and power also have NMI like contexts.
> >
> >
> > Ah and the comments suggest it's because pmu interrupts can't nest or so.
> > Anyway, that's notwithstanding the race that 5th patch fixes.
>
> Right, but they could interrupt a software event or the like.


Yeah indeed.

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From: Peter Zijlstra on 1 Jul 2010 12:00
On Thu, 2010-07-01 at 17:49 +0200, Frederic Weisbecker wrote:
> On Thu, Jul 01, 2010 at 05:46:01PM +0200, Peter Zijlstra wrote:
> > On Thu, 2010-07-01 at 17:35 +0200, Frederic Weisbecker wrote:
> > > - Most archs use one callchain buffer per cpu, except x86 that needs
> > > to deal with NMIs. Provide a default perf_callchain_buffer()
> > > implementation that x86 overrides.
> >
> > sparc and power also have NMI like contexts.
>
>
> Ah and the comments suggest it's because pmu interrupts can't nest or so.
> Anyway, that's notwithstanding the race that 5th patch fixes.

Right, but they could interrupt a software event or the like.

But yeah, the whole callchain thing can nest issue is real, thanks for
fixing that.
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From: Frederic Weisbecker on 1 Jul 2010 12:20
On Thu, Jul 01, 2010 at 05:46:01PM +0200, Peter Zijlstra wrote:
> On Thu, 2010-07-01 at 17:35 +0200, Frederic Weisbecker wrote:
> > - Most archs use one callchain buffer per cpu, except x86 that needs
> > to deal with NMIs. Provide a default perf_callchain_buffer()
> > implementation that x86 overrides.
>
> sparc and power also have NMI like contexts.


Right, but they didn't split that into different nested buffers.
The 5th patch does anyway.

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