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From: JDtrinid on 6 Jun 2010 20:31
Hi
I was wondering if anyone would provide me with a simple example on
how to implement a low pass filter using a FPGA
Just need something to get me started. I understand DSP and know some
HDL but can't figure out how to implement LPF...
From: Muzaffer Kal on 6 Jun 2010 21:57
On Sun, 6 Jun 2010 17:31:37 -0700 (PDT), JDtrinid <jdtrinid(a)gmail.com>
wrote:

>Hi
>I was wondering if anyone would provide me with a simple example on
>how to implement a low pass filter using a FPGA
>Just need something to get me started. I understand DSP and know some
>HDL but can't figure out how to implement LPF...

Unfortunately I can not reconcile individual claims in that last
sentence. Assuming they're accurate here is how I think you should
proceed.
1) Write down the difference equation necessary to implement a low
pass FIR.
2) Implement it in any language or simulation system you use and
figure out dynamic range of your inputs and filter states.
3) Implement the difference equation in HDL by paying attention to the
implementation of arithmetic which is good enough for the dynamic
range required in step 2.

Give this a try and come back with your progress and questions.
--
Muzaffer Kal

DSPIA INC.
ASIC/FPGA Design Services

http://www.dspia.com
From: glen herrmannsfeldt on 7 Jun 2010 00:21
JDtrinid <jdtrinid(a)gmail.com> wrote:

> I was wondering if anyone would provide me with a simple example on
> how to implement a low pass filter using a FPGA
> Just need something to get me started. I understand DSP and know some
> HDL but can't figure out how to implement LPF...

I believe that systolic arrays work well for such filters, though
I have used them for other problems. There should be enough
literature on them, but the important part is that they are
usually a series of processing units separated by registers.
All registers are clocked together such that the processed
data moves one step per clock cycle. An FIR could easily
be built with a multiply-add unit cell and a register for
each stage in the pipeline.

-- glen
From: Darol Klawetter on 7 Jun 2010 10:31
On Jun 6, 7:31 pm, JDtrinid <jdtri...(a)gmail.com> wrote:
> Hi
> I was wondering if anyone would provide me with a simple example on
> how to implement a low pass filter using a FPGA
> Just need something to get me started. I understand DSP  and know some
> HDL but can't figure out how to implement LPF...

There are examples in the "FIR Compiler" datasheet, which you can find
on the Xilinx website.

Darol Klawetter
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