scalar integer unit and SIMD share one pipeline
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From: joggingsong on 29 Jan 2008 04:25 Hi, all There is one difference tween CPU and DSP. In x86, integer SIMD instructions are MMX instructions, but MMX in x86 is one functional unit, which means MMX has its own pipeline. In DSP, scalar integer unit and SIMD share one pipeline. Will it make register allocation in c compiler more complex? I think in x86 MMX has its own register file, register allocation may be less complex. Best Regards Jogging
From: MitchAlsup on 29 Jan 2008 13:06 x86 MMX shares the register file with the x87 FPU x86 SSE has its own register file.
From: Michael Meissner on 31 Jan 2008 00:42
joggingsong(a)gmail.com writes: > Hi, all > There is one difference tween CPU and DSP. In x86, integer SIMD > instructions are > MMX instructions, but MMX in x86 is one functional unit, which means > MMX has its > own pipeline. In DSP, scalar integer unit and SIMD share one pipeline. > Will it make > register allocation in c compiler more complex? > I think in x86 MMX has its own register file, register allocation may > be less complex. You speak of the x86 as being a single monolithic architecture. There are many different machines each of which executes the x86 instruction set, and if you are doing optimal scheduling, they have different characteristics. You can have more than 1 integer unit or more than 1 floating point unit. What can make a register allocator challenging is non-regularities. For example on the x86, there are different instructions that use fixed registers (such as variable shift needing ECX/RCX for the shift count), and using different registers can change the encoding used which can also affect cache layout. If you are doing MMX vs. 387 instructions, you have to track which state the unit is in. -- Michael Meissner email: mrmnews(a)the-meissners.org http://www.the-meissners.org |