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From: Karl on 6 Apr 2008 21:08
why all this fuss about the need for new system level languages and
higher abstraction...systems were also heterogeneous in the past but
only few experts did implement them...hardware and software designers
were working apart. partitioning was done from the start. despite this
engineers were still delivering the required products. why people are
becoming so desperate and obsessed to have higher and more abstract
languages, to perform *pure* software-hardware codesign. is it because
of time to market issue? the complexity of and difficulty in designing
the modern applications with their required constraints? the
complexity of the hardware? limit of mono-core processors and von
Neumann model? the nature of the current applications being
computation intensive? the high revenue market of the modern
applications such in video and gaming industry ? lack of and expensive
qualified hardware designers? complexity of the proposed hardware
platforms and need for concurrent hardware and software expertise?
minimising the design cost...?what are in your opinion the main
factors

were there not tools to implement hybrid heterogeneous architectures
in the past? how people use to simulate them? why not maintaining the
same approach and methodology without PANICKING the EDA community to
develop urgently more abstract System level languages and associated
tools as it is happening nowadays. i am keen in the evolution but just
can't understand why all such rush is about

thanks
From: Kolja Sulimma on 7 Apr 2008 04:49
On 7 Apr., 03:08, Karl <karl.polyt...(a)googlemail.com> wrote:
A similar thought: While I think it is benefitial to design in higher
abstraction level,
I currently do not see the need for new languages. The tools are far
from exploiting the capabilities of the exisiting languages.

* where is VHDL2006/VHDL2008 support?
* why does XST change the type of all ports to std_logic when creating
timing models? How am I supposed to create abstract interfaces?
* where is synthesis of multiple wait statements per process? (think
about it: This is a major abstraction step when designing state
machines)
* Why does XST discourage the use of records, arrays, etc. in ports?
Even std_ulogic is discouraged! (Hello, there are no resolved signals
in modern FPGAs anymore)
* How about evaluating processes that only have a singe infinite wait
statement at the end during compile time? This is a nice way to
compute lookup tables an initial value assignment.

So, why does the industry believe it can do all this with a new
language if it is apparantly impossible to implement for the existing
languages that can specify this bahaviour for decades.

Kolja Sulimma


From: Jon Beniston on 7 Apr 2008 06:41

> I currently do not see the need for new languages. The tools are far
> from exploiting the capabilities of the exisiting languages.

But, the tools could do a better job if they had a better language
that more easily allowed you to specify what you really want to do.

> snip * stuff about XST *

XST isn't the only synthesis tool you know ;-)

Jon
From: Kolja Sulimma on 7 Apr 2008 07:15
On 7 Apr., 12:41, Jon Beniston <j...(a)beniston.com> wrote:
> XST isn't the only synthesis tool you know ;-)

Indeed.
But half of the issues are dictated by the backend tools.

I hear that Leonardo supports multiple wait statements.
I will eventually have a look at that.

Kolja

From: HT-Lab on 7 Apr 2008 07:29

"Kolja Sulimma" <ksulimma(a)googlemail.com> wrote in message
news:9bb25b03-43c3-4b8e-b27b-4128e855f809(a)59g2000hsb.googlegroups.com...
> On 7 Apr., 12:41, Jon Beniston <j...(a)beniston.com> wrote:
>> XST isn't the only synthesis tool you know ;-)
>
> Indeed.
> But half of the issues are dictated by the backend tools.
>
> I hear that Leonardo supports multiple wait statements.
> I will eventually have a look at that.

Make that Precision.

process
begin
wait until clk'event AND clk='1';
output_signal <= 0;
while (input_signal < 6) loop
wait until clk' event AND clk='1';
output_signal <= output_signal +1;
end loop;
end process;

Hans
www.ht-lab.com


>
> Kolja
>


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