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From: Borislav Petkov on 1 Jun 2010 04:30
From: Dan Carpenter <error27(a)gmail.com>
Date: Tue, Jun 01, 2010 at 03:11:27AM -0400

> This moves a couple dereferences after the checks in
> show_cache_disable() and store_cache_disable(). These were introduced
> fairly recently in 9350f982e4: "x86, cacheinfo: Reorganize AMD L3 cache
> structure"

Yes, this is correct, thanks. However I have a couple of patches which
rewrite and cleanup this section even more and was waiting for the merge
window to close before sending out. Stay tuned...

--
Regards/Gruss,
Boris.

Operating Systems Research Center
Advanced Micro Devices, Inc.

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