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From: Marc Jet on 28 Apr 2010 05:49
Martin Brückner wrote:
> When I started with this project I was sure that Linux invalidates
> caches

Whatever Linux does, it doesn't matter unless the CPU is able to see
and execute it.
From: Brian Drummond on 28 Apr 2010 07:12
On Wed, 28 Apr 2010 00:12:05 +0200, Martin Br�ckner <bj2spam(a)alice-dsl.net>
wrote:

>Am Tue, 27 Apr 2010 11:17:03 +0100
>schrieb Brian Drummond <brian_drummond(a)btconnect.com>:
>
>> On Tue, 27 Apr 2010 10:03:34 +0200, Martin Br�ckner
>> <bj2spam(a)alice-dsl.net> wrote:

>> >> > (*linux)();
>> >>
>> >> With the assumption that data pointers can be properly
>> >> cast to function pointers, that line should jump to
>> >> location 0x4002b4 and start executing the code there.

>> Xilinx example code typically has boilerplate to do things like
>> invalidate caches and set up interrupt state before handing over to
>> "real" code.

>> Have you covered these bases in your own code?
>
>When I started with this project I was sure that Linux invalidates
>caches and sets up the interrupt state a

You are probably correct on interrupts, but on caches...

>Anyway, all I tried out yet was disabling the cache but that did not
>help.

That would do it. Lets Linux invalidate, then enable them when safe.
If that's not your problem, then I can't help further.

The only other gotchas I remember are:

(1) the interrupt vector table has to be on a 64k boundary. The tools let you
put it anywhere but the bottom 16 address bits are chopped by the PPC!

(2) Downloading a bitfile via Impact, there was one (probably V2Pro-specific)
tick box that had to be set to reset the PPC correctly. The only reason I
mention this was that starting via XMD worked correctly.

- Brian


From: Martin Brückner on 30 Apr 2010 04:42
Am Wed, 28 Apr 2010 12:12:48 +0100
schrieb Brian Drummond <brian_drummond(a)btconnect.com>:

> On Wed, 28 Apr 2010 00:12:05 +0200, Martin Brückner <bj2spam(a)alice-dsl.net>
> wrote:
>
> >Am Tue, 27 Apr 2010 11:17:03 +0100
> >schrieb Brian Drummond <brian_drummond(a)btconnect.com>:
> >
> >> On Tue, 27 Apr 2010 10:03:34 +0200, Martin Brückner
> >> <bj2spam(a)alice-dsl.net> wrote:
>
> >> >> > (*linux)();
> >> >>
> >> >> With the assumption that data pointers can be properly
> >> >> cast to function pointers, that line should jump to
> >> >> location 0x4002b4 and start executing the code there.
>
> >> Xilinx example code typically has boilerplate to do things like
> >> invalidate caches and set up interrupt state before handing over to
> >> "real" code.
>
> >> Have you covered these bases in your own code?
> >
> >When I started with this project I was sure that Linux invalidates
> >caches and sets up the interrupt state a
>
> You are probably correct on interrupts, but on caches...
>
> >Anyway, all I tried out yet was disabling the cache but that did not
> >help.
>
> That would do it. Lets Linux invalidate, then enable them when safe.
> If that's not your problem, then I can't help further.
>
> The only other gotchas I remember are:
>
> (1) the interrupt vector table has to be on a 64k boundary. The tools let you
> put it anywhere but the bottom 16 address bits are chopped by the PPC!
Good to know but in my linker script the interrupt vector starts at
0x00000000

>
> (2) Downloading a bitfile via Impact, there was one (probably V2Pro-specific)
> tick box that had to be set to reset the PPC correctly. The only reason I
> mention this was that starting via XMD worked correctly.
Yes, there was this box for V2P FPGAs.

>
> - Brian
>

Thank you all for your help. I solved the problem with the help of the
second PowerPC core integrated in the Virtex 5.

Martin
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