Next: SHARC debug
From: eeh on 15 May 2005 08:16
Hi,

I used C6713 in my filter project. CCStudio IDE can be entered.
However, I cannot load the code to the target SDRAM. The error messages
are

"Data verification failed at address 0x8000E400. Please verify target
memory and memory map."
"Data verification failed at address ......... Please verify target
memory and memory map."
:
:
"Data verification failed at address ......... Please verify target
memory and memory map."

I used CE0 as chip select to the SDRAM. I suspect that the EClkOut is
not configured well. However, I cannot find the corresponding
parameters in DSP/BIOS.

Anyone know how to configure the EClkOut by the DSP BIOS or by other
methods? I need to multiply the oscillator input from 10MHz to 200MHz
and the SDRAM clock (EClkout) is 100MHz.

Thanks!

From: eeh on 17 May 2005 12:06
Do anyone have experience to use SDRAM in C6713 in custom board? If
yes, how to do configuration in DSP/BIOS or using other methods?

Thanks!

From: Brad Griffis on 17 May 2005 20:42
For the DSKs the EMIF is usually programmed in the GEL file (ultimately you
need to program it in your code). You could modify the dsk6713.gel file to
make one for your own board.

Are you sure the address in the error message is within the legal address
range? You need to make sure you're not trying to program addresses that
don't exist.

The 6713 has a software PLL. You need to specify your own init function to
program the PLL to spin you up to 225 MHz. If you're using the same speed
crystal as the DSK you could use the one from there.

Brad

"eeh" <eehobbyist(a)yahoo.com.hk> wrote in message
news:1116345994.794091.243150(a)g49g2000cwa.googlegroups.com...
> Do anyone have experience to use SDRAM in C6713 in custom board? If
> yes, how to do configuration in DSP/BIOS or using other methods?
>
> Thanks!
>


From: eeh on 7 Jun 2005 11:07
Hi,

My oscillator clock source is 10MHz. I set the PLL multplier to be x20,
and the DIV3 to be /2. However, I probe from the oscilloscope that the
ECLKOUT supplied to SDRAM is only 5 MHz. So I suspect that the PLL x20
is not working. Is this right? I the clock supplied to SDRAM is only 5
MHz, could the program be loaded to it?

From: eeh on 8 Jun 2005 09:23
I found something: When I set the EClkOut by GEL file. The EClkOut
changes to the designed frequency 100MHz for about one second and then
quickly changed back to 5MHz.

It seems that the PLL multiplier seems to be reset automatically.

Why this happens? Is something in the hardware unstable?

I suspect that the emi filter and capacitors attached to PLLHV pin. Are
they critical?

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