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From: Eric Smith on 9 Dec 2009 17:41
Is there some report ISE can produce that will tell me the locations
of all the blockrams it has placed? The post-PAR static timing
happens to tell me that memory/r[1].ram is RAMB16_X1Y17, because that
one is in a critical path, but grep through all of the generated files
for memory/r[ and RAMB16_X doesn't turn up any of the others.

I'd like to let PAR choose the locations of the blockrams, but use a
Python script to extract the locations from a report and generate a
BMM file.

Thanks,
Eric
From: Ed McGettigan on 9 Dec 2009 21:34
On Dec 9, 2:41 pm, Eric Smith <space...(a)gmail.com> wrote:
> Is there some report ISE can produce that will tell me the locations
> of all the blockrams it has placed?  The post-PAR static timing
> happens to tell me that memory/r[1].ram is RAMB16_X1Y17, because that
> one is in a critical path, but grep through all of the generated files
> for memory/r[ and RAMB16_X doesn't turn up any of the others.
>
> I'd like to let PAR choose the locations of the blockrams, but use a
> Python script to extract the locations from a report and generate a
> BMM file.
>
> Thanks,
> Eric

The data2mem tool doesn't require you to know the physical location of
a particular BlockRAM, it just needs to know what the name is like a
UCF file does.
http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/data2mem.pdf

Ed McGettigan
--
Xilinx Inc.
From: Eric Smith on 13 Dec 2009 02:23
> The data2mem tool doesn't require you to know the physical location of
> a particular BlockRAM, it just needs to know what the name is like a
> UCF file does.http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/data2...

Thanks! I'm still confused since that manual says (page 28) "The BMM
file <i>must</i> have LOC or PLACED constraints for each block RAM.
These constraints can be added manually, but they are most often
obtained as an annotated BMM file from Bitgen. For information, see
Using Integrated ISE(R) Design Suite Implementation Tools." I think
that is in reference to the "-bd" option to bitgen, but as far as I
can tell, that still needs to have physical location constraints for
the blockrams (page 33) "Placement information of each block RAM is
provided by teh NCD file. Any block RAM placement constraints that
appear in the BMM file are already reflected in the NCD information.
All othe rblock RAMs are assigned placement constraints by previous
tool steps."

I was originally using generic VHDL code to get XST to infer the
blockrams, and I couldn't figure out how to refer to them in
constraints, but I've given up on using inference and am now
instantiating RAMB16_S9 primitives.

Eric
From: Eric Smith on 13 Dec 2009 22:32
Thanks, Brian! That's very helpful!

Eric
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