Embedded clocks
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From: rickman on 11 Aug 2006 15:17 I was posting to the thread on the embedded clock in a Manchester encoded bit stream and realized that the clock is not truely embedded in the data stream. I say this because you still have to know the clock rate in order for it to work. The decoder has to lock out the edge detection for the time between bits to prevent detecting false bits. You have to know the data rate in order to time this lock out period. Of course the timing is much less critical than a typical clock, even an RC clock. But none the less you have to have a clock of a given frequency. Are there any methods of transmitting data and clock on a single wire that do not rely on the decoder having knowlege of the clock rate. This is not entirely academic. I have an interface I am working on where I need to multiplex multiple signals over a single pin. One is a serial bus and the others are discrete pins which require very accurate timing. Idealy the decoder would not have a clock, but rather the data would be self clocking. I would like to use a very low power CPLD that could be powered by either the signal or at least only require a few mA of current from an LDO on the battery connection. Is self clocking on a single pin possible? I am thinking that the extra info has to be presented in some manner that requires either a timing or amplitude measurement.
From: PeteS on 11 Aug 2006 15:39 rickman wrote: > I was posting to the thread on the embedded clock in a Manchester > encoded bit stream and realized that the clock is not truely embedded > in the data stream. I say this because you still have to know the > clock rate in order for it to work. The decoder has to lock out the > edge detection for the time between bits to prevent detecting false > bits. You have to know the data rate in order to time this lock out > period. Of course the timing is much less critical than a typical > clock, even an RC clock. But none the less you have to have a clock of > a given frequency. > > Are there any methods of transmitting data and clock on a single wire > that do not rely on the decoder having knowlege of the clock rate. > This is not entirely academic. I have an interface I am working on > where I need to multiplex multiple signals over a single pin. One is a > serial bus and the others are discrete pins which require very accurate > timing. Idealy the decoder would not have a clock, but rather the data > would be self clocking. I would like to use a very low power CPLD that > could be powered by either the signal or at least only require a few mA > of current from an LDO on the battery connection. > > Is self clocking on a single pin possible? I am thinking that the > extra info has to be presented in some manner that requires either a > timing or amplitude measurement. You do not have to know (except to within a very broad range) the clock rate for a manchester encoded (or many other techniques) to lock up to it. A Manchester encoded stream is guaranteed a transition every bit, and two transitions per bit for a logical 1 (some schemes did this for zero instead). That means the minimum transition rate on the line is clk/2 [zero bits] and for (statistically) 50% of the time, clk * 2 [ 1 bits]. Obviously, that means that *on average*, the transition rate of the line is the clock rate. This requires the loop filter of the PLL/DLL to be appropriately set, but within a pretty wide margin. Self clocking schemes abound, some with inherently wider bandwidths than others, although the issue is more usually the application than the technique. What was the application (clock rate variation in particular)? We may be able to suggest a suitable technique. Cheers PeteS
From: PeteS on 11 Aug 2006 15:47 PeteS wrote: > rickman wrote: > > I was posting to the thread on the embedded clock in a Manchester > > encoded bit stream and realized that the clock is not truely embedded > > in the data stream. I say this because you still have to know the > > clock rate in order for it to work. The decoder has to lock out the > > edge detection for the time between bits to prevent detecting false > > bits. You have to know the data rate in order to time this lock out > > period. Of course the timing is much less critical than a typical > > clock, even an RC clock. But none the less you have to have a clock of > > a given frequency. > > > > Are there any methods of transmitting data and clock on a single wire > > that do not rely on the decoder having knowlege of the clock rate. > > This is not entirely academic. I have an interface I am working on > > where I need to multiplex multiple signals over a single pin. One is a > > serial bus and the others are discrete pins which require very accurate > > timing. Idealy the decoder would not have a clock, but rather the data > > would be self clocking. I would like to use a very low power CPLD that > > could be powered by either the signal or at least only require a few mA > > of current from an LDO on the battery connection. > > > > Is self clocking on a single pin possible? I am thinking that the > > extra info has to be presented in some manner that requires either a > > timing or amplitude measurement. > > You do not have to know (except to within a very broad range) the clock > rate for a manchester encoded (or many other techniques) to lock up to > it. > > A Manchester encoded stream is guaranteed a transition every bit, and > two transitions per bit for a logical 1 (some schemes did this for zero > instead). > > That means the minimum transition rate on the line is clk/2 [zero bits] > and for (statistically) 50% of the time, clk * 2 [ 1 bits]. Obviously, > that means that *on average*, the transition rate of the line is the > clock rate. This requires the loop filter of the PLL/DLL to be > appropriately set, but within a pretty wide margin. > > Self clocking schemes abound, some with inherently wider bandwidths > than others, although the issue is more usually the application than > the technique. > > What was the application (clock rate variation in particular)? We may > be able to suggest a suitable technique. > > Cheers > > PeteS I'll correct my own mistake: (Blame the cold ;) For 50% of the time in a manchester encoded sheme, the transition rate is clk/2 and for 50% it's clk. By setting the loop filter at 3/4 clock (or even 5/8) we can lock in on the clock quite easily. (Nowadays - when it was first invented, it was quite a breakthrough and not easy at all). Certainly there are schemes that are wider band - 8b/10b encoding comes to mind for instance. Cheers PeteS
From: Jim Granville on 11 Aug 2006 16:28 rickman wrote: > I was posting to the thread on the embedded clock in a Manchester > encoded bit stream and realized that the clock is not truely embedded > in the data stream. I say this because you still have to know the > clock rate in order for it to work. The decoder has to lock out the > edge detection for the time between bits to prevent detecting false > bits. You have to know the data rate in order to time this lock out > period. Of course the timing is much less critical than a typical > clock, even an RC clock. But none the less you have to have a clock of > a given frequency. > > Are there any methods of transmitting data and clock on a single wire > that do not rely on the decoder having knowlege of the clock rate. > This is not entirely academic. I have an interface I am working on > where I need to multiplex multiple signals over a single pin. One is a > serial bus and the others are discrete pins which require very accurate > timing. Which means what, exactly ? fs ? Idealy the decoder would not have a clock, but rather the data > would be self clocking. I would like to use a very low power CPLD that > could be powered by either the signal or at least only require a few mA > of current from an LDO on the battery connection. > > Is self clocking on a single pin possible? I am thinking that the > extra info has to be presented in some manner that requires either a > timing or amplitude measurement. The closest to this would be PWM modulation, widely seen on 1-wire BUS designs. Intel have a SST bus, that has up to 2MBd PWM, but info is sparse. To demodulate PWM, you need only a dual monostable (or, a Single gated RC Osc + small divider ), and that Osc can Auto-start, so can idle in very low power states. Normally two time-slots are used, one monstable at 50% bit time, samples the data, and another is set to timeout after no-edges for XX time, which does the frame operations. With a CPLD, you control both, and can send using SPI with a good fifo ( you need to ensure no false frames, due to host pauses ) -jg
From: Frank Buss on 11 Aug 2006 16:34
rickman wrote: > Is self clocking on a single pin possible? I am thinking that the > extra info has to be presented in some manner that requires either a > timing or amplitude measurement. As Jim wrote, the one-wire bus can do this. With this concept you need only one wire (and ground) to power and communicate with a device: http://pdfserv.maxim-ic.com/en/an/onewirebus.pdf http://www.maxim-ic.com/appnotes.cfm/an_pk/126 -- Frank Buss, fb(a)frank-buss.de http://www.frank-buss.de, http://www.it4-systems.de |