From: Kappa on
Hi,

I have one problem to extract single bit from std_logic_vector, with
use of HEX suffix.

Ex:

signal out : std_logic;
signal in : std_logic_vector(7 downto 0);

out <= in(x"03");

I use HEX for compatibility with C source ...

When I check syntax with ISE I obtain an error, why ?

Thanks.

secureasm
From: Brian Drummond on
On Tue, 6 Apr 2010 02:09:45 -0700 (PDT), Kappa <secureasm(a)gmail.com>
wrote:

>Hi,
>
>I have one problem to extract single bit from std_logic_vector, with
>use of HEX suffix.
>
>Ex:
>
>signal out : std_logic;
>signal in : std_logic_vector(7 downto 0);
>
>out <= in(x"03");
>
>I use HEX for compatibility with C source ...
>
>When I check syntax with ISE I obtain an error, why ?
>
Because the index of a std_logic_vector is an integer (or subtype of
integer) but X"03" specifies a bit-vector.

You can express your index in base-16, but the syntax is

out <= in(16#03#);

- Brian

From: Jan Pech on

On Tue, 2010-04-06 at 02:09 -0700, Kappa wrote:
> Hi,
>
> I have one problem to extract single bit from std_logic_vector, with
> use of HEX suffix.
>
> Ex:
>
> signal out : std_logic;
> signal in : std_logic_vector(7 downto 0);
>
> out <= in(x"03");
>
> I use HEX for compatibility with C source ...
>
> When I check syntax with ISE I obtain an error, why ?
>
> Thanks.
>
> secureasm

Because you did not use hex integer but bit_vector/std_logic_vector.
Hexadecimal integer constant would be 16#03#.

Jan

From: Kappa on
Thanks at all,

> Because the index of a std_logic_vector is an integer (or subtype of
> integer) but X"03" specifies a bit-vector.

I are not expert in VHDL ...

> You can express your index in base-16, but the syntax is
> out <= in(16#03#);

This work very well.

secureasm