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From: Usama on 1 Apr 2010 01:49
I am implementing BMD design as explained in xapp1052(v2.5). Have
implemented the design on Avnet V5LXT/SXT PCIe Development Board using
the PCIe. Have generated the Endpoint Block plus for PCIe 1.9 using
ISE 10.1. I have been successful in running the BMD design with both
the legacy interrupts and Message signal interrupts using single
vector.

The application which I am working on generates multiple interrupts in
the RTL to the host application. So far I have assigned only one
vector to the all the interrupts in the RTL design due to which after
receiving the interrupt at the application end I have to go and check
a register to see which interrupt has occurred. I don’t want my
application to go and read the register rather it should know which
interrupt has occurred. Now as per the understanding developed through
the document of PCIe endpoint, there are interrupts vectors that need
to be generated at the time of PCIe core generation in order to assign
each interrupt a different vector. The questions I need to ask are as
follow:

• How to link the multiple interrupts in the RTL with the multiple
vectors of the MSI?

• Are there any changes need to be made in the RTL design?

• Is there any reference material that could help me doing this ?
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