[PATCH] arch/tile: Shrink the tile-opcode files considerably.
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From: Chris Metcalf on 25 Jun 2010 17:20 The C file (tile-desc_{32,64}.c) was about 300KB before this change, and is now shrunk down to 100K. The original file included support for BFD in the binutils toolchain, which is not necessary in the kernel; the kernel version only needs to include enough support to enable the single-stepper and backtracer. Signed-off-by: Chris Metcalf <cmetcalf(a)tilera.com> --- arch/tile/include/asm/opcode-tile_32.h | 93 +- arch/tile/include/asm/opcode-tile_64.h | 93 +- arch/tile/kernel/tile-desc_32.c |14144 ++++---------------------------- 3 files changed, 1410 insertions(+), 12920 deletions(-) diff --git a/arch/tile/include/asm/opcode-tile_32.h b/arch/tile/include/asm/opcode-tile_32.h index 90f8dd3..eda60ec 100644 --- a/arch/tile/include/asm/opcode-tile_32.h +++ b/arch/tile/include/asm/opcode-tile_32.h @@ -28,6 +28,7 @@ typedef enum TILE_OPC_MOVELI_SN, TILE_OPC_MOVELIS, TILE_OPC_PREFETCH, + TILE_OPC_RAISE, TILE_OPC_ADD, TILE_OPC_ADD_SN, TILE_OPC_ADDB, @@ -419,43 +420,6 @@ typedef enum #define TILE_ELF_NAME "elf32-tilepro" -enum -{ - TILE_SN_MAX_OPERANDS = 6 /* route */ -}; - -typedef enum -{ - TILE_SN_OPC_BZ, - TILE_SN_OPC_BNZ, - TILE_SN_OPC_JRR, - TILE_SN_OPC_FNOP, - TILE_SN_OPC_BLZ, - TILE_SN_OPC_NOP, - TILE_SN_OPC_MOVEI, - TILE_SN_OPC_MOVE, - TILE_SN_OPC_BGEZ, - TILE_SN_OPC_JR, - TILE_SN_OPC_BLEZ, - TILE_SN_OPC_BBNS, - TILE_SN_OPC_JALRR, - TILE_SN_OPC_BPT, - TILE_SN_OPC_JALR, - TILE_SN_OPC_SHR1, - TILE_SN_OPC_BGZ, - TILE_SN_OPC_BBS, - TILE_SN_OPC_SHL8II, - TILE_SN_OPC_ADDI, - TILE_SN_OPC_HALT, - TILE_SN_OPC_ROUTE, - TILE_SN_OPC_NONE -} tile_sn_mnemonic; - -extern const unsigned char tile_sn_route_encode[6 * 6 * 6]; -extern const signed char tile_sn_route_decode[256][3]; -extern const char tile_sn_direction_names[6][5]; -extern const signed char tile_sn_dest_map[6][6]; - static __inline unsigned int get_BrOff_SN(tile_bundle_bits num) @@ -1387,8 +1351,6 @@ create_UnShOpcodeExtension_Y1(int num) } -typedef unsigned short tile_sn_instruction_bits; - typedef enum { @@ -1519,41 +1481,10 @@ struct tile_opcode * index into the tile_operands[] table. */ unsigned char operands[TILE_NUM_PIPELINE_ENCODINGS][TILE_MAX_OPERANDS]; - /* A mask of which bits have predefined values for each pipeline. - * This is useful for disassembly. */ - tile_bundle_bits fixed_bit_masks[TILE_NUM_PIPELINE_ENCODINGS]; - - /* For each bit set in fixed_bit_masks, what the value is for this - * instruction. */ - tile_bundle_bits fixed_bit_values[TILE_NUM_PIPELINE_ENCODINGS]; }; extern const struct tile_opcode tile_opcodes[]; -struct tile_sn_opcode -{ - /* The opcode mnemonic, e.g. "add" */ - const char *name; - - /* The enum value for this mnemonic. */ - tile_sn_mnemonic mnemonic; - - /* How many operands are there? */ - unsigned char num_operands; - - /* The description of the operands. Each of these is an - * index into the tile_operands[] table. */ - unsigned char operands[TILE_SN_MAX_OPERANDS]; - - /* A mask of which bits have predefined values. - * This is useful for disassembly. */ - tile_sn_instruction_bits fixed_bit_mask; - - /* For each bit set in fixed_bit_masks, what its value is. */ - tile_sn_instruction_bits fixed_bit_values; -}; - -extern const struct tile_sn_opcode tile_sn_opcodes[]; /* Used for non-textual disassembly into structs. */ struct tile_decoded_instruction @@ -1571,27 +1502,5 @@ extern int parse_insn_tile(tile_bundle_bits bits, decoded[TILE_MAX_INSTRUCTIONS_PER_BUNDLE]); -/* Canonical names of all the registers. */ -/* ISSUE: This table lives in "tile-dis.c" */ -extern const char * const tile_register_names[]; - -/* Descriptor for a special-purpose register. */ -struct tile_spr -{ - /* The number */ - int number; - - /* The name */ - const char *name; -}; - -/* List of all the SPRs; ordered by increasing number. */ -extern const struct tile_spr tile_sprs[]; - -/* Number of special-purpose registers. */ -extern const int tile_num_sprs; - -extern const char * -get_tile_spr_name (int num); #endif /* opcode_tile_h */ diff --git a/arch/tile/include/asm/opcode-tile_64.h b/arch/tile/include/asm/opcode-tile_64.h index 90f8dd3..eda60ec 100644 --- a/arch/tile/include/asm/opcode-tile_64.h +++ b/arch/tile/include/asm/opcode-tile_64.h @@ -28,6 +28,7 @@ typedef enum TILE_OPC_MOVELI_SN, TILE_OPC_MOVELIS, TILE_OPC_PREFETCH, + TILE_OPC_RAISE, TILE_OPC_ADD, TILE_OPC_ADD_SN, TILE_OPC_ADDB, @@ -419,43 +420,6 @@ typedef enum #define TILE_ELF_NAME "elf32-tilepro" -enum -{ - TILE_SN_MAX_OPERANDS = 6 /* route */ -}; - -typedef enum -{ - TILE_SN_OPC_BZ, - TILE_SN_OPC_BNZ, - TILE_SN_OPC_JRR, - TILE_SN_OPC_FNOP, - TILE_SN_OPC_BLZ, - TILE_SN_OPC_NOP, - TILE_SN_OPC_MOVEI, - TILE_SN_OPC_MOVE, - TILE_SN_OPC_BGEZ, - TILE_SN_OPC_JR, - TILE_SN_OPC_BLEZ, - TILE_SN_OPC_BBNS, - TILE_SN_OPC_JALRR, - TILE_SN_OPC_BPT, - TILE_SN_OPC_JALR, - TILE_SN_OPC_SHR1, - TILE_SN_OPC_BGZ, - TILE_SN_OPC_BBS, - TILE_SN_OPC_SHL8II, - TILE_SN_OPC_ADDI, - TILE_SN_OPC_HALT, - TILE_SN_OPC_ROUTE, - TILE_SN_OPC_NONE -} tile_sn_mnemonic; - -extern const unsigned char tile_sn_route_encode[6 * 6 * 6]; -extern const signed char tile_sn_route_decode[256][3]; -extern const char tile_sn_direction_names[6][5]; -extern const signed char tile_sn_dest_map[6][6]; - static __inline unsigned int get_BrOff_SN(tile_bundle_bits num) @@ -1387,8 +1351,6 @@ create_UnShOpcodeExtension_Y1(int num) } -typedef unsigned short tile_sn_instruction_bits; - typedef enum { @@ -1519,41 +1481,10 @@ struct tile_opcode * index into the tile_operands[] table. */ unsigned char operands[TILE_NUM_PIPELINE_ENCODINGS][TILE_MAX_OPERANDS]; - /* A mask of which bits have predefined values for each pipeline. - * This is useful for disassembly. */ - tile_bundle_bits fixed_bit_masks[TILE_NUM_PIPELINE_ENCODINGS]; - - /* For each bit set in fixed_bit_masks, what the value is for this - * instruction. */ - tile_bundle_bits fixed_bit_values[TILE_NUM_PIPELINE_ENCODINGS]; }; extern const struct tile_opcode tile_opcodes[]; -struct tile_sn_opcode -{ - /* The opcode mnemonic, e.g. "add" */ - const char *name; - - /* The enum value for this mnemonic. */ - tile_sn_mnemonic mnemonic; - - /* How many operands are there? */ - unsigned char num_operands; - - /* The description of the operands. Each of these is an - * index into the tile_operands[] table. */ - unsigned char operands[TILE_SN_MAX_OPERANDS]; - - /* A mask of which bits have predefined values. - * This is useful for disassembly. */ - tile_sn_instruction_bits fixed_bit_mask; - - /* For each bit set in fixed_bit_masks, what its value is. */ - tile_sn_instruction_bits fixed_bit_values; -}; - -extern const struct tile_sn_opcode tile_sn_opcodes[]; /* Used for non-textual disassembly into structs. */ struct tile_decoded_instruction @@ -1571,27 +1502,5 @@ extern int parse_insn_tile(tile_bundle_bits bits, decoded[TILE_MAX_INSTRUCTIONS_PER_BUNDLE]); -/* Canonical names of all the registers. */ -/* ISSUE: This table lives in "tile-dis.c" */ -extern const char * const tile_register_names[]; - -/* Descriptor for a special-purpose register. */ -struct tile_spr -{ - /* The number */ - int number; - - /* The name */ - const char *name; -}; - -/* List of all the SPRs; ordered by increasing number. */ -extern const struct tile_spr tile_sprs[]; - -/* Number of special-purpose registers. */ -extern const int tile_num_sprs; - -extern const char * -get_tile_spr_name (int num); #endif /* opcode_tile_h */ diff --git a/arch/tile/kernel/tile-desc_32.c b/arch/tile/kernel/tile-desc_32.c index 3b78369..69af0e1 100644 --- a/arch/tile/kernel/tile-desc_32.c +++ b/arch/tile/kernel/tile-desc_32.c @@ -1,12 +1,5 @@ -/* Define to include "bfd.h" and get actual BFD relocations below. */ -/* #define WANT_BFD_RELOCS */ - -#ifdef WANT_BFD_RELOCS -#include "bfd.h" -#define MAYBE_BFD_RELOC(X) (X) -#else -#define MAYBE_BFD_RELOC(X) -1 -#endif +/* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else. */ +#define BFD_RELOC(x) -1 /* Special registers. */ #define TREG_LR 55 @@ -16,11014 +9,1193 @@ /* FIXME: Rename this. */ #include <asm/opcode-tile.h> +#include <linux/stddef.h> -const struct tile_opcode tile_opcodes[394] = +const struct tile_opcode tile_opcodes[395] = { - { "bpt", TILE_OPC_BPT, 0x2 /* pipes */, 0 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 0, /* can_bundle */ - { - /* operands */ - { 0, }, - { }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfbffffff80000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x400b3cae00000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bpt", TILE_OPC_BPT, 0x2, 0, TREG_ZERO, 0, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, }, - { "info", TILE_OPC_INFO, 0xf /* pipes */, 1 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0 }, - { 1 }, - { 2 }, - { 3 }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00fffULL, - 0xfff807ff80000000ULL, - 0x8000000078000fffULL, - 0xf80007ff80000000ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000050100fffULL, - 0x302007ff80000000ULL, - 0x8000000050000fffULL, - 0xc00007ff80000000ULL, - -1ULL - } + { "info", TILE_OPC_INFO, 0xf, 1, TREG_ZERO, 1, + { { 0 }, { 1 }, { 2 }, { 3 }, { 0, } }, }, - { "infol", TILE_OPC_INFOL, 0x3 /* pipes */, 1 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 4 }, - { 5 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x8000000070000fffULL, - 0xf80007ff80000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000030000fffULL, - 0x200007ff80000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "infol", TILE_OPC_INFOL, 0x3, 1, TREG_ZERO, 1, + { { 4 }, { 5 }, { 0, }, { 0, }, { 0, } }, }, - { "j", TILE_OPC_J, 0x2 /* pipes */, 1 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 6 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xf000000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x5000000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "j", TILE_OPC_J, 0x2, 1, TREG_ZERO, 1, + { { 0, }, { 6 }, { 0, }, { 0, }, { 0, } }, }, - { "jal", TILE_OPC_JAL, 0x2 /* pipes */, 1 /* num_operands */, - TREG_LR, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 6 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xf000000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x6000000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "jal", TILE_OPC_JAL, 0x2, 1, TREG_LR, 1, + { { 0, }, { 6 }, { 0, }, { 0, }, { 0, } }, }, - { "move", TILE_OPC_MOVE, 0xf /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8 }, - { 9, 10 }, - { 11, 12 }, - { 13, 14 }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffff000ULL, - 0xfffff80000000000ULL, - 0x80000000780ff000ULL, - 0xf807f80000000000ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000000cff000ULL, - 0x0833f80000000000ULL, - 0x80000000180bf000ULL, - 0x9805f80000000000ULL, - -1ULL - } + { "move", TILE_OPC_MOVE, 0xf, 2, TREG_ZERO, 1, + { { 7, 8 }, { 9, 10 }, { 11, 12 }, { 13, 14 }, { 0, } }, }, - { "move.sn", TILE_OPC_MOVE_SN, 0x3 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8 }, - { 9, 10 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffff000ULL, - 0xfffff80000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000008cff000ULL, - 0x0c33f80000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "move.sn", TILE_OPC_MOVE_SN, 0x3, 2, TREG_SN, 1, + { { 7, 8 }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, }, - { "movei", TILE_OPC_MOVEI, 0xf /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 0 }, - { 9, 1 }, - { 11, 2 }, - { 13, 3 }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00fc0ULL, - 0xfff807e000000000ULL, - 0x8000000078000fc0ULL, - 0xf80007e000000000ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000040800fc0ULL, - 0x305807e000000000ULL, - 0x8000000058000fc0ULL, - 0xc80007e000000000ULL, - -1ULL - } + { "movei", TILE_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1, + { { 7, 0 }, { 9, 1 }, { 11, 2 }, { 13, 3 }, { 0, } }, }, - { "movei.sn", TILE_OPC_MOVEI_SN, 0x3 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 0 }, - { 9, 1 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00fc0ULL, - 0xfff807e000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000048800fc0ULL, - 0x345807e000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "movei.sn", TILE_OPC_MOVEI_SN, 0x3, 2, TREG_SN, 1, + { { 7, 0 }, { 9, 1 }, { 0, }, { 0, }, { 0, } }, }, - { "moveli", TILE_OPC_MOVELI, 0x3 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 4 }, - { 9, 5 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x8000000070000fc0ULL, - 0xf80007e000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000020000fc0ULL, - 0x180007e000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "moveli", TILE_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1, + { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } }, }, - { "moveli.sn", TILE_OPC_MOVELI_SN, 0x3 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 4 }, - { 9, 5 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x8000000070000fc0ULL, - 0xf80007e000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000010000fc0ULL, - 0x100007e000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "moveli.sn", TILE_OPC_MOVELI_SN, 0x3, 2, TREG_SN, 1, + { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } }, }, - { "movelis", TILE_OPC_MOVELIS, 0x3 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 4 }, - { 9, 5 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x8000000070000fc0ULL, - 0xf80007e000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000010000fc0ULL, - 0x100007e000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "movelis", TILE_OPC_MOVELIS, 0x3, 2, TREG_SN, 1, + { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } }, }, - { "prefetch", TILE_OPC_PREFETCH, 0x12 /* pipes */, 1 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10 }, - { 0, }, - { 0, }, - { 15 } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfffff81f80000000ULL, - 0ULL, - 0ULL, - 0x8700000003f00000ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x400b501f80000000ULL, - -1ULL, - -1ULL, - 0x8000000003f00000ULL - } + { "prefetch", TILE_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1, + { { 0, }, { 10 }, { 0, }, { 0, }, { 15 } }, }, - { "add", TILE_OPC_ADD, 0xf /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 11, 12, 18 }, - { 13, 14, 19 }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0x80000000780c0000ULL, - 0xf806000000000000ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x00000000000c0000ULL, - 0x0806000000000000ULL, - 0x8000000008000000ULL, - 0x8800000000000000ULL, - -1ULL - } + { "raise", TILE_OPC_RAISE, 0x2, 0, TREG_ZERO, 1, + { { 0, }, { }, { 0, }, { 0, }, { 0, } }, }, - { "add.sn", TILE_OPC_ADD_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x00000000080c0000ULL, - 0x0c06000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "add", TILE_OPC_ADD, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, }, - { "addb", TILE_OPC_ADDB, 0x3 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000000040000ULL, - 0x0802000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "add.sn", TILE_OPC_ADD_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "addb.sn", TILE_OPC_ADDB_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000008040000ULL, - 0x0c02000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addb", TILE_OPC_ADDB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "addbs_u", TILE_OPC_ADDBS_U, 0x3 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000001880000ULL, - 0x0888000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addb.sn", TILE_OPC_ADDB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "addbs_u.sn", TILE_OPC_ADDBS_U_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000009880000ULL, - 0x0c88000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addbs_u", TILE_OPC_ADDBS_U, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "addh", TILE_OPC_ADDH, 0x3 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000000080000ULL, - 0x0804000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addbs_u.sn", TILE_OPC_ADDBS_U_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "addh.sn", TILE_OPC_ADDH_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000008080000ULL, - 0x0c04000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addh", TILE_OPC_ADDH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "addhs", TILE_OPC_ADDHS, 0x3 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x00000000018c0000ULL, - 0x088a000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addh.sn", TILE_OPC_ADDH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "addhs.sn", TILE_OPC_ADDHS_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x00000000098c0000ULL, - 0x0c8a000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addhs", TILE_OPC_ADDHS, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "addi", TILE_OPC_ADDI, 0xf /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 0 }, - { 9, 10, 1 }, - { 11, 12, 2 }, - { 13, 14, 3 }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00000ULL, - 0xfff8000000000000ULL, - 0x8000000078000000ULL, - 0xf800000000000000ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000040300000ULL, - 0x3018000000000000ULL, - 0x8000000048000000ULL, - 0xb800000000000000ULL, - -1ULL - } + { "addhs.sn", TILE_OPC_ADDHS_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "addi.sn", TILE_OPC_ADDI_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 0 }, - { 9, 10, 1 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00000ULL, - 0xfff8000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000048300000ULL, - 0x3418000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addi", TILE_OPC_ADDI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, }, - { "addib", TILE_OPC_ADDIB, 0x3 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 0 }, - { 9, 10, 1 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00000ULL, - 0xfff8000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000040100000ULL, - 0x3008000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addi.sn", TILE_OPC_ADDI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, }, - { "addib.sn", TILE_OPC_ADDIB_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 0 }, - { 9, 10, 1 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00000ULL, - 0xfff8000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000048100000ULL, - 0x3408000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addib", TILE_OPC_ADDIB, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, }, - { "addih", TILE_OPC_ADDIH, 0x3 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 0 }, - { 9, 10, 1 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00000ULL, - 0xfff8000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000040200000ULL, - 0x3010000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addib.sn", TILE_OPC_ADDIB_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, }, - { "addih.sn", TILE_OPC_ADDIH_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 0 }, - { 9, 10, 1 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00000ULL, - 0xfff8000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000048200000ULL, - 0x3410000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addih", TILE_OPC_ADDIH, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, }, - { "addli", TILE_OPC_ADDLI, 0x3 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 4 }, - { 9, 10, 5 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x8000000070000000ULL, - 0xf800000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000020000000ULL, - 0x1800000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addih.sn", TILE_OPC_ADDIH_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, }, - { "addli.sn", TILE_OPC_ADDLI_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 4 }, - { 9, 10, 5 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x8000000070000000ULL, - 0xf800000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000010000000ULL, - 0x1000000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addli", TILE_OPC_ADDLI, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, }, - { "addlis", TILE_OPC_ADDLIS, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 4 }, - { 9, 10, 5 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x8000000070000000ULL, - 0xf800000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000010000000ULL, - 0x1000000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addli.sn", TILE_OPC_ADDLI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, }, - { "adds", TILE_OPC_ADDS, 0x3 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000001800000ULL, - 0x0884000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "addlis", TILE_OPC_ADDLIS, 0x3, 3, TREG_SN, 1, + { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, }, - { "adds.sn", TILE_OPC_ADDS_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000009800000ULL, - 0x0c84000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "adds", TILE_OPC_ADDS, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "adiffb_u", TILE_OPC_ADIFFB_U, 0x1 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 0, }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000000100000ULL, - -1ULL, - -1ULL, - -1ULL, - -1ULL - } + { "adds.sn", TILE_OPC_ADDS_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "adiffb_u.sn", TILE_OPC_ADIFFB_U_SN, 0x1 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 0, }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000008100000ULL, - -1ULL, - -1ULL, - -1ULL, - -1ULL - } + { "adiffb_u", TILE_OPC_ADIFFB_U, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, }, - { "adiffh", TILE_OPC_ADIFFH, 0x1 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 0, }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000000140000ULL, - -1ULL, - -1ULL, - -1ULL, - -1ULL - } + { "adiffb_u.sn", TILE_OPC_ADIFFB_U_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, }, - { "adiffh.sn", TILE_OPC_ADIFFH_SN, 0x1 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 0, }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000008140000ULL, - -1ULL, - -1ULL, - -1ULL, - -1ULL - } + { "adiffh", TILE_OPC_ADIFFH, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, }, - { "and", TILE_OPC_AND, 0xf /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 11, 12, 18 }, - { 13, 14, 19 }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0x80000000780c0000ULL, - 0xf806000000000000ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000000180000ULL, - 0x0808000000000000ULL, - 0x8000000018000000ULL, - 0x9800000000000000ULL, - -1ULL - } + { "adiffh.sn", TILE_OPC_ADIFFH_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, }, - { "and.sn", TILE_OPC_AND_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 9, 10, 17 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0xfffe000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000008180000ULL, - 0x0c08000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "and", TILE_OPC_AND, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, }, - { "andi", TILE_OPC_ANDI, 0xf /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 0 }, - { 9, 10, 1 }, - { 11, 12, 2 }, - { 13, 14, 3 }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00000ULL, - 0xfff8000000000000ULL, - 0x8000000078000000ULL, - 0xf800000000000000ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000050100000ULL, - 0x3020000000000000ULL, - 0x8000000050000000ULL, - 0xc000000000000000ULL, - -1ULL - } + { "and.sn", TILE_OPC_AND_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, }, - { "andi.sn", TILE_OPC_ANDI_SN, 0x3 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 0 }, - { 9, 10, 1 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ff00000ULL, - 0xfff8000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000058100000ULL, - 0x3420000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "andi", TILE_OPC_ANDI, 0xf, 3, TREG_ZERO, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, }, - { "auli", TILE_OPC_AULI, 0x3 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 4 }, - { 9, 10, 5 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x8000000070000000ULL, - 0xf800000000000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000030000000ULL, - 0x2000000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "andi.sn", TILE_OPC_ANDI_SN, 0x3, 3, TREG_SN, 1, + { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, }, - { "avgb_u", TILE_OPC_AVGB_U, 0x1 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 0, }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x00000000001c0000ULL, - -1ULL, - -1ULL, - -1ULL, - -1ULL - } + { "auli", TILE_OPC_AULI, 0x3, 3, TREG_ZERO, 1, + { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, }, - { "avgb_u.sn", TILE_OPC_AVGB_U_SN, 0x1 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 0, }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x00000000081c0000ULL, - -1ULL, - -1ULL, - -1ULL, - -1ULL - } + { "avgb_u", TILE_OPC_AVGB_U, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, }, - { "avgh", TILE_OPC_AVGH, 0x1 /* pipes */, 3 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 0, }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000000200000ULL, - -1ULL, - -1ULL, - -1ULL, - -1ULL - } + { "avgb_u.sn", TILE_OPC_AVGB_U_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, }, - { "avgh.sn", TILE_OPC_AVGH_SN, 0x1 /* pipes */, 3 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8, 16 }, - { 0, }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffc0000ULL, - 0ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000008200000ULL, - -1ULL, - -1ULL, - -1ULL, - -1ULL - } + { "avgh", TILE_OPC_AVGH, 0x1, 3, TREG_ZERO, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, }, - { "bbns", TILE_OPC_BBNS, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000700000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "avgh.sn", TILE_OPC_AVGH_SN, 0x1, 3, TREG_SN, 1, + { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, }, - { "bbns.sn", TILE_OPC_BBNS_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000700000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bbns", TILE_OPC_BBNS, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bbnst", TILE_OPC_BBNST, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000780000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bbns.sn", TILE_OPC_BBNS_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bbnst.sn", TILE_OPC_BBNST_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000780000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bbnst", TILE_OPC_BBNST, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bbs", TILE_OPC_BBS, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000600000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bbnst.sn", TILE_OPC_BBNST_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bbs.sn", TILE_OPC_BBS_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000600000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bbs", TILE_OPC_BBS, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bbst", TILE_OPC_BBST, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000680000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bbs.sn", TILE_OPC_BBS_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bbst.sn", TILE_OPC_BBST_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000680000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bbst", TILE_OPC_BBST, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bgez", TILE_OPC_BGEZ, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000300000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bbst.sn", TILE_OPC_BBST_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bgez.sn", TILE_OPC_BGEZ_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000300000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bgez", TILE_OPC_BGEZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bgezt", TILE_OPC_BGEZT, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000380000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bgez.sn", TILE_OPC_BGEZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bgezt.sn", TILE_OPC_BGEZT_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000380000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bgezt", TILE_OPC_BGEZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bgz", TILE_OPC_BGZ, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000200000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bgezt.sn", TILE_OPC_BGEZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bgz.sn", TILE_OPC_BGZ_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000200000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bgz", TILE_OPC_BGZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bgzt", TILE_OPC_BGZT, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000280000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bgz.sn", TILE_OPC_BGZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bgzt.sn", TILE_OPC_BGZT_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000280000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bgzt", TILE_OPC_BGZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bitx", TILE_OPC_BITX, 0x5 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8 }, - { 0, }, - { 11, 12 }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffff000ULL, - 0ULL, - 0x80000000780ff000ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000070161000ULL, - -1ULL, - 0x80000000680a1000ULL, - -1ULL, - -1ULL - } + { "bgzt.sn", TILE_OPC_BGZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bitx.sn", TILE_OPC_BITX_SN, 0x1 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8 }, - { 0, }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffff000ULL, - 0ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000078161000ULL, - -1ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bitx", TILE_OPC_BITX, 0x5, 2, TREG_ZERO, 1, + { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, }, - { "blez", TILE_OPC_BLEZ, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000500000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bitx.sn", TILE_OPC_BITX_SN, 0x1, 2, TREG_SN, 1, + { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, }, - { "blez.sn", TILE_OPC_BLEZ_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000500000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "blez", TILE_OPC_BLEZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "blezt", TILE_OPC_BLEZT, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000580000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "blez.sn", TILE_OPC_BLEZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "blezt.sn", TILE_OPC_BLEZT_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000580000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "blezt", TILE_OPC_BLEZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "blz", TILE_OPC_BLZ, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000400000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "blezt.sn", TILE_OPC_BLEZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "blz.sn", TILE_OPC_BLZ_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000400000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "blz", TILE_OPC_BLZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "blzt", TILE_OPC_BLZT, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000480000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "blz.sn", TILE_OPC_BLZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "blzt.sn", TILE_OPC_BLZT_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000480000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "blzt", TILE_OPC_BLZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bnz", TILE_OPC_BNZ, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000100000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "blzt.sn", TILE_OPC_BLZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bnz.sn", TILE_OPC_BNZ_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000100000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bnz", TILE_OPC_BNZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bnzt", TILE_OPC_BNZT, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000180000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bnz.sn", TILE_OPC_BNZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bnzt.sn", TILE_OPC_BNZT_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000180000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bnzt", TILE_OPC_BNZT, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bytex", TILE_OPC_BYTEX, 0x5 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8 }, - { 0, }, - { 11, 12 }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffff000ULL, - 0ULL, - 0x80000000780ff000ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000070162000ULL, - -1ULL, - 0x80000000680a2000ULL, - -1ULL, - -1ULL - } + { "bnzt.sn", TILE_OPC_BNZT_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bytex.sn", TILE_OPC_BYTEX_SN, 0x1 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 7, 8 }, - { 0, }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0x800000007ffff000ULL, - 0ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - 0x0000000078162000ULL, - -1ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bytex", TILE_OPC_BYTEX, 0x5, 2, TREG_ZERO, 1, + { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, }, - { "bz", TILE_OPC_BZ, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bytex.sn", TILE_OPC_BYTEX_SN, 0x1, 2, TREG_SN, 1, + { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, }, - { "bz.sn", TILE_OPC_BZ_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2c00000000000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bz", TILE_OPC_BZ, 0x2, 2, TREG_ZERO, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bzt", TILE_OPC_BZT, 0x2 /* pipes */, 2 /* num_operands */, - TREG_ZERO, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - 0ULL, - 0xfc00000780000000ULL, - 0ULL, - 0ULL, - 0ULL - }, - { - /* fixed_bit_values */ - -1ULL, - 0x2800000080000000ULL, - -1ULL, - -1ULL, - -1ULL - } + { "bz.sn", TILE_OPC_BZ_SN, 0x2, 2, TREG_SN, 1, + { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, }, - { "bzt.sn", TILE_OPC_BZT_SN, 0x2 /* pipes */, 2 /* num_operands */, - TREG_SN, /* implicitly_written_register */ - 1, /* can_bundle */ - { - /* operands */ - { 0, }, - { 10, 20 }, - { 0, }, - { 0, }, - { 0, } - }, - { - /* fixed_bit_masks */ - |