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From: Philip Pemberton on 25 May 2010 17:47
On Tue, 25 May 2010 06:38:05 -0700, MooseFET wrote:

> Switching to Altera looks to be safe to do. I haven't designed in any
> of their parts lately so I won't have to warn you away from any of them.

I'm quite fond of them. My first "proper" FPGA devkit was a DE1 (bought
mainly because it had a good price-performance ratio and the Minimig-DE1
team were porting Minimig to it) so I've got a bit of a 'soft spot' for
ALTR.

I will, however, admit that the first PLD I ever used was a Lattice GAL;
their insistence that I needed a "Lattice Approved" programmer for it was
a bit offputting until I found out about (and built a) GALBlast. Software
was mediocre, I used to use Atmel-WinCupl, tried to learn registered
logic but couldn't stand the syntax for that. All my GALs ended up being
used as address decoders in my 6502 computer.

First CPLD I used was a Xilinx XC9572XL... back in the days when Windows
98 was king, and you only had Win2000 if you were on the beta team. I'm a
compulsive hoarder of LCD displays, and had a couple of direct-drive ones
in my scrap bin. Spent the afternoon reverse engineering the display
pinouts with a Fluke 25 DMM, then hooked up the CPLD and reversed the
pixel shift order. Good fun.

> I like the Altera software (sort of). There VHDL compiler had a major
> bug in it back when I tried to use one of their parts in a design.
> Chances are, they have fixed it by now. I didn't use their part.

I usually use the Verilog side of things, though occasionally do mixed-
mode (Vlog+VHDL) when I have a VHDL IP core I need to use. That's pretty
rare though.

> Xilinx's tools are absolutely huge and so hard to figure out that I gave
> up on their parts fairly early in looking at them.

I started learning ISE because I'd just bought a Drigmorn2. I figured
Xilinx's free dev tools would be about as good as Altera's... how wrong I
was!

Just getting the SDRAM timing right has been an exercise that would only
appeal to a masochist. I finally figured it out at nearly 11:45 last
night... kick the refresh timing down, then force everything SDRAM
related into an IOB, set the slew rate to FAST, and figure out what to
set the phase-shift of the DCM to.

When I did this on the DE1, Quartus picked up most of what I was doing,
and all I had to set was the PLL phase-shift. Not bad. I think I had the
LatticeMico32 core up and running in a few hours, and SDRAM a day or so
after that.

> Lattice made some parts that looked interesting but IIRC you could not
> get the actual datasheet without making a user name and password. I ran
> away from that in terror. There is no way that a company that makes a
> good part is going to do stuff like that.

Can't say I've tried Lattice's FPGAs. I looked at them a few years ago
and basically discounted them because I couldn't get hold of them
(although I could get a programming cable... for £595, plus ~£2k for the
ispLEVER software -- the cable alone was more expensive than XLNX's then-
current offering IIRC)

> Way back when, a company called ICT made some parts that just made it
> into the CPLD class. They had the best tool for development of CPLD
> stuff that I have ever seen. This was back in the DOS days. The tool
> was dead simple to use and just flat worked. Unfortunately for them, I
> designed in their flagship product. You know the rest of the story.

That would be the ICT PEEL series, right?

Allegedly still in production today -- ICT went bust, then Anachip bought
the PLD product line, and Anachip were bought by Diodes Inc. The
datasheets aren't on DI's website, but Mouser list the PEEL series as
current products.

If you're hellbent on using SPLDs, the GAL series are still the best
(IMO), but these days you're better off looking at a small CPLD like a
Xilinx XC9500XL, CoolRunner or one of the Altera MAX-II parts... for a
start they tend to be equal in price to (or cheaper than) the SPLDs.

--
Phil.
usenet10(a)philpem.me.uk
http://www.philpem.me.uk/
If mail bounces, replace "10" with the last two digits of the current year
From: Fredxx on 26 May 2010 05:06
John Larkin wrote:
> On Tue, 25 May 2010 09:12:05 -0700 (PDT), d_s_klein
> <d_s_klein(a)yahoo.com> wrote:
>
>>
>> I've had *very* good responses when I've called Altera and said that
>> I was wanting to migrate.
>>
>> That said, no matter which side of the fence (A<->X) I'm on, it
>> always looks greener on the other side :)
>>
>> RK
>
> Xilinx probably has better silicon, and it works great. The software
> is a train wreck.
>

It seems nothing much has changed in the past decade or more! Shame Xilinx
don't make more effort with their software, then they'd win on both counts.


From: krw on 26 May 2010 20:46
On Wed, 26 May 2010 10:06:00 +0100, "Fredxx" <fredxx(a)spam.com> wrote:

>John Larkin wrote:
>> On Tue, 25 May 2010 09:12:05 -0700 (PDT), d_s_klein
>> <d_s_klein(a)yahoo.com> wrote:
>>
>>>
>>> I've had *very* good responses when I've called Altera and said that
>>> I was wanting to migrate.
>>>
>>> That said, no matter which side of the fence (A<->X) I'm on, it
>>> always looks greener on the other side :)
>>>
>>> RK
>>
>> Xilinx probably has better silicon, and it works great. The software
>> is a train wreck.
>>
>
>It seems nothing much has changed in the past decade or more! Shame Xilinx
>don't make more effort with their software, then they'd win on both counts.

I was using Xilinx' software (ISE) a couple of years ago. It seemed to work
fairly well, but was a PITA to use (far more complicated than it needed to
be). Ten years ago it was far worse (Synplicity was a must). According to
John, it's back to broken. Dunno, I'm not likely to use Xilinx for some time.
From: Fredxx on 27 May 2010 04:44

<krw(a)att.bizzzzzzzzzzzz> wrote in message
news:6vfrv5tn7amr16jqeaav62fr5hp4sre227(a)4ax.com...
> On Wed, 26 May 2010 10:06:00 +0100, "Fredxx" <fredxx(a)spam.com> wrote:
>
>>John Larkin wrote:
>>> On Tue, 25 May 2010 09:12:05 -0700 (PDT), d_s_klein
>>> <d_s_klein(a)yahoo.com> wrote:
>>>
>>>>
>>>> I've had *very* good responses when I've called Altera and said that
>>>> I was wanting to migrate.
>>>>
>>>> That said, no matter which side of the fence (A<->X) I'm on, it
>>>> always looks greener on the other side :)
>>>>
>>>> RK
>>>
>>> Xilinx probably has better silicon, and it works great. The software
>>> is a train wreck.
>>>
>>
>>It seems nothing much has changed in the past decade or more! Shame
>>Xilinx
>>don't make more effort with their software, then they'd win on both
>>counts.
>
> I was using Xilinx' software (ISE) a couple of years ago. It seemed to
> work
> fairly well, but was a PITA to use (far more complicated than it needed to
> be). Ten years ago it was far worse (Synplicity was a must). According
> to
> John, it's back to broken. Dunno, I'm not likely to use Xilinx for some
> time.

Its always been broken in some way or another. I get frustrated at the
number of times I get an error message where the software has tied itself up
in knots and inviting me to open a webcase. And while Xilinx know what the
error code is, there's no help available on the site to help the cause.
It's usually a piece of code, which is of correct syntax, but something ISE
can't cope with and throws the baby out with the bath water. The code can
be isolated by commenting chunks out, and there's always been a work around,
but it's not untypical for their webcase to take a month to sort out.


From: Nial Stewart on 27 May 2010 05:46
Just to even things up, I've used A and X devices in the last few years and
know and prefer the Altera tools much more, but.....

A client was hoping to use Altera's PCI Lite (free master/target 32bit/33MHz)
core for a project I'm currently working on. November/December last year I
tried integrating it in the SOPC system I was building but it was broken.

The values set in the configuration pages changed when you saved it and opened it
again and when apparently built cleanly, meeting all timing constraints, the PCI
card froze the PC I was testing on.

It was clear that there had been very litte verification/quality control on this
which is unlike Altera, their software mostly just works.

IMHO

Nial.



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