System design in FPGA
in [FPGA]
|
Prev: Call for Papers: The 2010 International Conference on Wireless Networks (ICWN'10), USA, July 2010
Next: how to read bmp file in vhdl
From: jozamm on 19 Feb 2010 05:50 Hi all, I am a budding FPGA designer and I am in the process of designing first system. Until now I have partitioned my system into various entities, each entity implementing a small part of the system. It is also easier for implementation. However I have found myself in routing a lot of signals from one entity to another which increases complexity in a way. The other option is implement the system in a single entity and a number of process. This would simplify matters because I would not need to route lots signals between one entity and another. The disadvantage is a lack of clarity. What is the best way for implementation? Any ideas and suggestions would be welcome. Thanks very much, Regards, Joseph
From: RCIngham on 19 Feb 2010 06:01 >Hi all, > >I am a budding FPGA designer and I am in the process of designing >first system. Until now I have partitioned my system into various >entities, each entity implementing a small part of the system. It is >also easier for implementation. However I have found myself in routing >a lot of signals from one entity to another which increases complexity >in a way. > >The other option is implement the system in a single entity and a >number of process. This would simplify matters because I would not >need to route lots signals between one entity and another. The >disadvantage is a lack of clarity. > >What is the best way for implementation? Any ideas and suggestions >would be welcome. > >Thanks very much, > >Regards, > >Joseph > Part of the "art" of system design is structuring and organizing the hierarchy in a near-optimal way. Don't expect to get it right the first time that you do it. Do aspire to get better with subsequent projects. HTH! --------------------------------------- Posted through http://www.FPGARelated.com
From: Magne Munkejord on 19 Feb 2010 07:43 RCIngham wrote: >> Hi all, >> >> I am a budding FPGA designer and I am in the process of designing >> first system. Until now I have partitioned my system into various >> entities, each entity implementing a small part of the system. It is >> also easier for implementation. However I have found myself in routing >> a lot of signals from one entity to another which increases complexity >> in a way. >> >> The other option is implement the system in a single entity and a >> number of process. This would simplify matters because I would not >> need to route lots signals between one entity and another. The >> disadvantage is a lack of clarity. >> >> What is the best way for implementation? Any ideas and suggestions >> would be welcome. >> >> Thanks very much, >> >> Regards, >> >> Joseph >> > > Part of the "art" of system design is structuring and organizing the > hierarchy in a near-optimal way. Don't expect to get it right the first > time that you do it. Do aspire to get better with subsequent projects. > > HTH! > > > --------------------------------------- > Posted through http://www.FPGARelated.com Hi, the one-entity option seems like a step in the wrong direction. Try to have a look at your design again, see if you can identify data paths and controls signals. Drawing sketches on a piece of paper usually helps.
From: Curt Johnson on 19 Feb 2010 10:37 jozamm wrote: > Hi all, > > I am a budding FPGA designer and I am in the process of designing > first system. Until now I have partitioned my system into various > entities, each entity implementing a small part of the system. It is > also easier for implementation. However I have found myself in routing > a lot of signals from one entity to another which increases complexity > in a way. > > The other option is implement the system in a single entity and a > number of process. This would simplify matters because I would not > need to route lots signals between one entity and another. The > disadvantage is a lack of clarity. > > What is the best way for implementation? Any ideas and suggestions > would be welcome. > > Thanks very much, > > Regards, > > Joseph Grouping signals into records can reduce the pain of routing signals between entities. Curt
From: Mike Treseler on 19 Feb 2010 15:29
jozamm wrote: > I am a budding FPGA designer and I am in the process of designing > first system. Until now I have partitioned my system into various > entities, each entity implementing a small part of the system. It is > also easier for implementation. However I have found myself in routing > a lot of signals from one entity to another which increases complexity > in a way. I like big modules/entities because HDLs give me leverage inside the box, but little leverage wiring boxes together. If all else is equal, Architectures that need the same signal want to be merged. Processes that need the same variable want to be merged. For me, the modules/entity size is limited by the unit test. -- Mike Treseler |