VHDL coding
in [FPGA]
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From: gouri on 7 Apr 2010 21:37 HI, I want to use sll operator(shift operator)specified in VHDL93. I am using xilinx ISE simulator.The compilation of code fails giving error HDLParsers:808- sll can not have such operands in this context. I think that i should activate VHDL93 in the simulator.MODELSIM has the facility to activate it through compiler settings. HOw to activate it in XILINX? Plz tell me.It's very very urgent. --------------------------------------- Posted through http://www.FPGARelated.com
From: maurizio.tranchero on 8 Apr 2010 05:36 You can use the "explicit" shift: process( clk ) begin i f rst = '1' then A <= ( others => '0' ); elsif rising_edge( clk ) then A( N-2 downto 0 ) <= A( N-1 downto 1 ); A( N-1 ) <= '0'; end if; end process; Obviously this code should be adapted to your specific case. Regards, mt
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