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From: Gladys on 2 Aug 2010 11:16
Hi all,
I'm implementing an i2c core using FPGA to build interface between
DSP and sensors, the objective is to configure the sensors using i2c
bus, FPGA first acts as i2c slave and receives all the register data
from DSP, then switch as i2c master to send duplicates of register
data to several sensors(each sensors receives the same set of register
data).
I was thinking about using a RAM to store the register data, however,
the register address are in 16bits(randomly but not continuously) ,
the register data are also in 16bits, so I decided to use and LUT
table to map the register data to the correspond addresses, it works
fine, but it's ressource consuming, it takes almost half of fully used
LUT-FF pairs of target FPGA. So I'm wondering if there is any other
way to implement the i2c core. Thanks a lot.
From: Gabor on 2 Aug 2010 13:57
On Aug 2, 11:16 am, Gladys <yuhu...(a)gmail.com> wrote:
> Hi all,
>  I'm implementing an i2c core using FPGA to build interface between
> DSP and sensors,  the objective is to configure the sensors using i2c
> bus, FPGA first acts as i2c slave and receives all the register data
> from DSP, then switch as i2c master to send duplicates of register
> data to several sensors(each sensors receives the same set of register
> data).
>  I was thinking about using a RAM to store the register data, however,
> the register address are in 16bits(randomly but not continuously) ,
> the register data are also in 16bits, so I decided to use and LUT
> table to map the register data to the correspond addresses, it works
> fine, but it's ressource consuming, it takes almost half of fully used
> LUT-FF pairs of target FPGA. So I'm wondering if there is any other
> way to implement the i2c core. Thanks a lot.

Why not just "record" the i2c commands as they come in from the host,
i.e. store the address as well as data as a long stream of bytes into
an
8-bit wide block RAM (or go 9 bits wide to mark the start of
transactions).
Then just "play back" the commands to the slaves. Alternatively use
a 32-bit wide block RAM to store address / data pairs. This would
only
need to be as deep as the total number of registers actually used.
Then
your address translation isn't necessary.

Regards,
Gabor
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