x86: fix keeping track of AMD C1E
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From: H. Peter Anvin on 16 Jul 2010 03:00 On 07/16/2010 08:39 AM, Borislav Petkov wrote: > From: "H. Peter Anvin"<hpa(a)zytor.com> > Date: Fri, Jul 16, 2010 at 12:25:39AM -0400 > >> On 07/14/2010 02:31 PM, Michal Schmidt wrote: >>> >>> This suggests that another way to fix my problem would be this (tested): >>> >> >> This is a change of semantics from an AND to an OR across CPUs... > > You mean the c1e_detected variable and the CPUID flag, right? Well, > frankly and if I'm not missing anything, we actually only need to track > when either bits [27,28] get set in that MSR - MSR_K8_INT_PENDING_MSG - > in order to do timer broadcast. > > And strictly speaking, we don't need a variable for that at all (nor a > synthetic CPUID flag, for that matter) - we can simply read the MSR as > much as we'd like after we've detected that this CPU supports C1E. > > But having the value cached is faster and doesn't enlarge checking > code in acpi_processor_cstate_check(). > > I think the reason for adding the syntetic cpuid flag is only to > communicate to the ACPI processor module that we don't support deeper > C-states on a C1E machine, see a8d6829044901a67732904be5f1eacdf8539604f. > So we don't strictly need it and we can only export c1e_detected to the > rest for simplicity. > No, the difference between using a separate variable and the CPU feature bit is that CPU feature bit is ANDed across all CPUs, whereas this variable is set if it is set on *any* CPU. -hpa -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
From: Borislav Petkov on 16 Jul 2010 03:30 From: "H. Peter Anvin" <hpa(a)zytor.com> Date: Thu, Jul 15, 2010 at 05:56:40PM -0400 > >> This is a change of semantics from an AND to an OR across CPUs... > > > > You mean the c1e_detected variable and the CPUID flag, right? Well, > > frankly and if I'm not missing anything, we actually only need to track > > when either bits [27,28] get set in that MSR - MSR_K8_INT_PENDING_MSG - > > in order to do timer broadcast. > > > > And strictly speaking, we don't need a variable for that at all (nor a > > synthetic CPUID flag, for that matter) - we can simply read the MSR as > > much as we'd like after we've detected that this CPU supports C1E. > > > > But having the value cached is faster and doesn't enlarge checking > > code in acpi_processor_cstate_check(). > > > > I think the reason for adding the syntetic cpuid flag is only to > > communicate to the ACPI processor module that we don't support deeper > > C-states on a C1E machine, see a8d6829044901a67732904be5f1eacdf8539604f. > > So we don't strictly need it and we can only export c1e_detected to the > > rest for simplicity. > > > > No, the difference between using a separate variable and the CPU feature > bit is that CPU feature bit is ANDed across all CPUs, whereas this > variable is set if it is set on *any* CPU. .... and that's ok because the MSR bits get set on all cores after BIOS turns on C1E. Let me verify this though. -- Regards/Gruss, Boris. Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
From: H. Peter Anvin on 16 Jul 2010 12:10 On 07/16/2010 12:22 AM, Borislav Petkov wrote: >> >> No, the difference between using a separate variable and the CPU feature >> bit is that CPU feature bit is ANDed across all CPUs, whereas this >> variable is set if it is set on *any* CPU. > > ... and that's ok because the MSR bits get set on all cores after BIOS > turns on C1E. Let me verify this though. > Is there any reason for the OR behavior? Otherwise, it's just plain wrong... -hpa -- H. Peter Anvin, Intel Open Source Technology Center I work for Intel. I don't speak on their behalf. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
From: Borislav Petkov on 16 Jul 2010 12:30 From: "H. Peter Anvin" <hpa(a)zytor.com> Date: Fri, Jul 16, 2010 at 12:02:32PM -0400 > On 07/16/2010 12:22 AM, Borislav Petkov wrote: > >> > >> No, the difference between using a separate variable and the CPU feature > >> bit is that CPU feature bit is ANDed across all CPUs, whereas this > >> variable is set if it is set on *any* CPU. > > > > ... and that's ok because the MSR bits get set on all cores after BIOS > > turns on C1E. Let me verify this though. > > > > Is there any reason for the OR behavior? Otherwise, it's just plain > wrong... I don't see the need for two things denoting C1E for the very simple reason: when C1E gets enabled on a machine, one of the bits gets set in the MSR on each core simultaneously. So if one core sees one of the bits set, all the remaining cores are seeing them too. The first core that sees one of the bits in the MSR, sets c1e_detected. So next time any core does cpu_idle() => c1e_idle(), it switches to timer broadcast on it since it might go into C1E if all the others follow. Frankly, I can't think of a case where we'd need to two things - I could be missing something. But this workaround is a couple of years old, maybe Thomas might give us more insight into whether there's a particular reason for the cpuid flag and the c1e_detected variable. Thomas? -- Regards/Gruss, Boris. Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
From: H. Peter Anvin on 16 Jul 2010 18:30
On 07/16/2010 09:25 AM, Borislav Petkov wrote: > > I don't see the need for two things denoting C1E for the very simple > reason: when C1E gets enabled on a machine, one of the bits gets set in > the MSR on each core simultaneously. So if one core sees one of the bits > set, all the remaining cores are seeing them too. The first core that > sees one of the bits in the MSR, sets c1e_detected. > > So next time any core does cpu_idle() => c1e_idle(), it switches to > timer broadcast on it since it might go into C1E if all the others > follow. > > Frankly, I can't think of a case where we'd need to two things - I > could be missing something. But this workaround is a couple of years > old, maybe Thomas might give us more insight into whether there's a > particular reason for the cpuid flag and the c1e_detected variable. > Thomas? > I'm not saying there should be two things (and that's clearly wrong no matter what), but rather it's not clear to me that the one thing should be a variable. -hpa -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ |