From: Borislav Petkov on
From: "H. Peter Anvin" <hpa(a)zytor.com>
Date: Fri, Jul 16, 2010 at 06:28:33PM -0400

> On 07/16/2010 09:25 AM, Borislav Petkov wrote:
> >
> > I don't see the need for two things denoting C1E for the very simple
> > reason: when C1E gets enabled on a machine, one of the bits gets set in
> > the MSR on each core simultaneously. So if one core sees one of the bits
> > set, all the remaining cores are seeing them too. The first core that
> > sees one of the bits in the MSR, sets c1e_detected.
> >
> > So next time any core does cpu_idle() => c1e_idle(), it switches to
> > timer broadcast on it since it might go into C1E if all the others
> > follow.
> >
> > Frankly, I can't think of a case where we'd need to two things - I
> > could be missing something. But this workaround is a couple of years
> > old, maybe Thomas might give us more insight into whether there's a
> > particular reason for the cpuid flag and the c1e_detected variable.
> > Thomas?
> >
>
> I'm not saying there should be two things (and that's clearly wrong no
> matter what), but rather it's not clear to me that the one thing should
> be a variable.

Why not? Once one of the MSR bits is turned on, it stays on until next
reboot. The variable caches that value which will not change and saves
us the rdmsr everytime a cpu goes idle. So I don't see the need to have
a function instead which checks the MSR everytime, for example.

Btw, I think we should wait with whatever fix we come up until the
merge window so that we have more time to fix any fallout then (which I
don't expect but who knows) instead of rushing this now. We can always
backport it then too.

--
Regards/Gruss,
Boris.

Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
General Managers: Alberto Bozzo, Andrew Bowd
Registration: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632

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From: Heinz Diehl on
On 14.07.2010, Michal Schmidt wrote:

> The chipset is 890FX. Motherboard Asus M4A89TD PRO/USB3.
> BIOS is the latest version: 0901 (05/17/2010 according to dmidecode)

> I found another person reporting the same symptoms on
> GIGABYTE GA-MA770T-UD3P AthlonXII 620 (4 cores) kernel 2.6.33.5
(Mandriva)
> (http://www.abclinuxu.cz/poradna/hardware/show/308799, in Czech)

I have exactly the same problem on my system.
Gigabyte GA-MA770-UD3 (Rev. 1.0), latest BIOS F9g, Phenom II X4 905e.

Will try your patch and report back.



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From: Heinz Diehl on
On 15.07.2010, Michal Schmidt wrote:

> This suggests that another way to fix my problem would be this (tested):
[....]

Did apply this patch to stock 2.6.35-rc5, it does _not_ fix my C1E problem.
It takes a lot of key pressing in the boot process to get the system up,
just as it has been before.

(I'll post my dmesg with your debugging patch applied in another mail.)

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From: Heinz Diehl on
On 14.07.2010, Michal Schmidt wrote:

> I found another person reporting the same symptoms on
> GIGABYTE GA-MA770T-UD3P AthlonXII 620 (4 cores) kernel 2.6.33.5 (Mandriva)
> (http://www.abclinuxu.cz/poradna/hardware/show/308799, in Czech)

Here's the relevant part of my dmesg, kernel 2.6.35-rc5 with your
debbuging patch applied (just the debbuging patch, no other fix/patch in
this thread). The full dmesg output is attached.

[....]
Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
Mount-cache hash table entries: 256
tseg: 00cfe00000
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
identify_cpu: before ANDing, c1e_detected: 0, boot_cpu_has(C1E): 0
identify_cpu: after ANDing, c1e_detected: 0, boot_cpu_has(C1E): 0
mce: CPU supports 6 MCE banks
using C1E aware idle routine
Performance Events: AMD PMU driver.
.... version: 0
.... bit width: 48
.... generic registers: 4
.... value mask: 0000ffffffffffff
.... max period: 00007fffffffffff
.... fixed-purpose events: 0
.... event mask: 000000000000000f
ACPI: Core revision 20100428
Setting APIC routing to flat
...TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
CPU0: AMD Phenom(tm) II X4 905e Processor stepping 02
c1e_idle: cpu: 0, bits 0x08000000, c1e_detected: 0, boot_cpu_has(C1E): 0
System has AMD C1E enabled
Switch to broadcast mode on CPU0
Booting Node 0, Processors #1
identify_cpu: before ANDing, c1e_detected: 1, boot_cpu_has(C1E): 1
identify_cpu: after ANDing, c1e_detected: 1, boot_cpu_has(C1E): 0
Switch to broadcast mode on CPU1
#2
identify_cpu: before ANDing, c1e_detected: 1, boot_cpu_has(C1E): 0
identify_cpu: after ANDing, c1e_detected: 1, boot_cpu_has(C1E): 0
Switch to broadcast mode on CPU2
#3
identify_cpu: before ANDing, c1e_detected: 1, boot_cpu_has(C1E): 0
identify_cpu: after ANDing, c1e_detected: 1, boot_cpu_has(C1E): 0
Brought up 4 CPUs
Total of 4 processors activated (20092.25 BogoMIPS).
Switch to broadcast mode on CPU3
NET: Registered protocol family 16
node 0 link 0: io port [c000, ffff]
TOM: 00000000d0000000 aka 3328M

From: Heinz Diehl on
On 14.07.2010, Michal Schmidt wrote:

> On my system with AMD Phenom II X6 I am seeing pauses at boot (usually during
> udev startup) which require a key press to continue. It only happens if C1E is
> enabled in the BIOS.

That's exactly what I see. Unfortunately, this patch doesn't fix it for me
either (applied to 2.6.35-rc5).



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